MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 139

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.7.6 Power-On Reset
MC68F375
REFERENCE MANUAL
After the 512-clock cycle assertion of the RESET pin, the processing flow for both
internal and external resets is the same. The SCIM2E reset control logic will release
the RESET pin and read configuration information from BERR, BKPT, and
DATA[15:0]. Refer to
information.
Ten clock cycles will elapse to allow the pull-up resistor on RESET to pull the pin high.
The reset control logic will then sample the RESET pin. If the pin is high, the reset con-
trol logic will release the external bus interface (EBI) and allow the reset vector to be
fetched. If RESET is still low, 180 clock cycles will elapse, and the reset control logic
will sample the pin again. As above, if RESET is high, processing will resume and the
reset vector will be fetched.
If RESET still has not risen to logic one, the reset control logic will begin the external
reset sequence as described at the beginning of this section. Further reset exception
processing will not proceed until RESET is sampled at logic one after the 10-clock
cycle or 180-clock cycle delays described above.
sequence for the SCIM2E.
Power-on reset (POR) operation involves special circumstances related to the appli-
cation of system power and, if the PLL is used, clock synthesizer power. V
time affects pin state during reset. Slow V
indeterminate state longer than is desired or is tolerable in some applications.
When the PLL is used to generate the MCU system clock, oscillator start up time also
determines how long MCU pins remain in an indeterminate state. Immediate applica-
tion of V
oscillator circuit design play an important role in minimizing start up time.
Grounding V
ing at the frequency input on the EXTAL pin. In this case, any events requiring clock
cycles during POR will occur as quickly as those clock cycles are input on the EXTAL
pin.
Power-on reset activates a circuit in the SCIM2E that asserts the internal and external
RESET lines. As V
begins to generate the system clock and the internal RESET line is negated. This ini-
tializes SCIM2E pins the values shown in
At this point, POR will proceed no further until the PLL locks at two or 256 times f
fast or slow reference modes, respectively. Reset exception processing will then con-
tinue as outlined in
which permits normal reset exception processing as soon as the internal RESET line
is negated.
The SCIM2E propagates RESET and the system clock to all other MCU modules.
Once the clock is running and internal RESET is asserted for at least four clock cycles,
these modules reset. V
DDSYN
DDSYN
/MODCLK power and careful attention to crystal specifications and
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
DD
/MODCLK places the MCU in external clock mode, initially operat-
Freescale Semiconductor, Inc.
4.7.5 Reset
ramps up to the minimum operating voltage, the PLL (if enabled)
For More Information On This Product,
DD
4.7.8 Operating Configuration Out of Reset
and PLL ramp up times determine how long these four clock
Go to: www.freescale.com
Timing. In external clock mode, the PLL is disabled
Rev. 25 June 03
Table
DD
ramp times can leave MCU pins in an
4-24.
Figure 4-18
depicts the reset
MOTOROLA
for more
DD
ramp
ref
4-57
in