MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 385

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CMFIBAH — CMFI Base Address High Register
CMFIBAL — CMFI Base Address Low Register
MC68F375
REFERENCE MANUAL
MSB
MSB
Bit(s)
31:24
23:16
15:12
NOTES:
NOTES:
11:0
31
15
U
0
RESET:
RESET:
1. Indicates bits protected by LOCK and STOP. The default state of these bits is read from address 0x000008 of
1. Indicates bits protected by LOCK and STOP. The default state of these bits is read from address 0x000008 of
the shadow row on reset.
the shadow row on reset.
CMFIBAL
30
14
U
0
CMFIBAH
CMFIBAL
Name
29
13
U
0
1
Table 10-8 CMFIBAR (CMFIBAH, CMFIBAL) Bit Settings
Reserved
The 32-bit base address of the CMFI array memory address block is contained in the CMFIBAH
and CMFIBAL array base address registers. The base address register (CMFIBAR) is formed
by concatenating the contents of CMFIBAH and CMFIBAL. CMFIBAH contains the high order
16 bits of the address (A[31:16]) and CMFIBAL contains the next lower order bits. The value of
CMFIBAH and CMFIBAL are forced to the user defined value programmed in CMFI shadow reg-
isters on master RESET. CMFIBAH and CMFIBAL can be written to relocate the CMFI array to
an alternate block of memory only when the LOCK bit is 1 and the CMFI module is in STOP
mode.
NOTE: For a 256K module, CMFIBAH[17:16] and CMFIBAL[15:12] should be programmed to 0.
Reserved
RESERVED
28
12
U
0
Freescale Semiconductor, Inc.
27
11
0
0
CDR MoneT FLASH FOR THE IMB3 (CMFI)
For More Information On This Product,
26
10
0
0
Go to: www.freescale.com
25
0
9
0
Rev. 25 June 03
24
0
8
0
23
U
7
0
Description
RESERVED
22
U
6
0
21
U
5
0
CMFIBAH
20
U
4
0
19
U
3
0
1
18
U
2
0
0xYF F80A
0xYF F808
MOTOROLA
17
U
1
0
10-15
LSB
LSB
16
U
0
0

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