MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 122

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.6.2.1 Read Cycle
4.6.2.2 Write Cycle
MC68F375
REFERENCE MANUAL
During a read cycle, the MCU transfers data from an external memory or peripheral
device. If the instruction specifies a long-word or word operation, the MCU attempts to
read two bytes at once. For a byte operation, the MCU reads one byte. The portion of
the data bus from which each byte is read depends on operand size, peripheral
address, and peripheral port size.
Figure 4-11
4.5.4 Misaligned
more information.
During a write cycle, the MCU transfers data to an external memory or peripheral
device. If the instruction specifies a long-word or word operation, the MCU attempts to
write two bytes at once. For a byte operation, the MCU writes one byte. The portion of
the data bus upon which each byte is written depends on operand size, peripheral
address, and peripheral port size.
Figure 4-12
Misaligned
information.
1) SET R/W TO READ
2) DRIVE ADDRESS ON ADDR[23:0]
3) DRIVE FUNCTION CODE ON FC[2:0]
4) DRIVE SIZ[1:0] FOR OPERAND SIZE
is a flow chart of a write-cycle. Refer to
Operands, and the
is a flow chart of a word read cycle. Refer to
NEGATE AS AND DS (S5)
ASSERT AS AND DS (S1)
START NEXT CYCLE (S0)
ADDRESS DEVICE (S0)
DECODE DSACK (S3)
LATCH DATA (S4)
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Operands, and the
Figure 4-11 Word Read Cycle Flowchart
Freescale Semiconductor, Inc.
MCU
For More Information On This Product,
Go to: www.freescale.com
SCIM Reference Manual (SCIMRM/AD)
Rev. 25 June 03
SCIM Reference Manual (SCIMRM/AD)
1) DECODE ADDRESS, R/W, SIZ[1:0], DS
2) PLACE DATA ON DATA[15:0] OR
3) ASSERT DSACK SIGNALS
1) REMOVE DATA FROM DATA BUS
2) NEGATE DSACK
DATA[15:8] IF 8-BIT DATA
4.5.2 Dynamic Bus
TERMINATE CYCLE (S5)
PRESENT DATA (S2)
PERIPHERAL
4.5.2 Dynamic Bus
RD CYC FLOW
Sizing,
MOTOROLA
for more
Sizing,
4.5.4
4-40
for