MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 599

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

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Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
ABD 4-61, 4-66, 4-67
ACKERR 7-31
Acknowledge error (ACKERR) 7-31
ADDR
Address
AN 5-4, 5-5
Analog
Arbitration 6-6
Arbitration priorities 4-71
AS 4-42, 4-51
AS 4-49, 4-50
Asynchronous
ATEMP 3-22
Autovector (AVEC). See AVEC 4-25
AVEC 4-25, 4-36, 4-72, 4-73, 4-75, 4-78, 4-85
Background
bus signals 4-32
signal 4-37
bus (ADDR) 4-32
bus disable (ABD) 4-61
-mark wakeup 6-56
space 5-7
strobe (AS). See AS 4-32
front-end multiplexer 5-14
input
section contents 5-1
submodule block diagram 5-12
supply pins 5-6
bus cycles classified as 4-39
cycles 4-31
exceptions 4-55
mode 4-84
resets 4-55
debug mode 3-19, 4-43
MC68F375
REFERENCE MANUAL
encoding 4-35
multiplexed 5-5
port A 5-4
port B 5-4
commands 3-22
connector pinout 3-26
enabling 3-20
entering 3-21
registers
returning from 3-24
fault address register (FAR) 3-23
instruction program counter (PCC) 3-23
return program counter (RPC) 3-23
–A–
–B–
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
INDEX
INDEX
Base ID mask bits 7-30
Basic operand size 4-37
Baud
BCD 3-4
Beginning of queue 2 (BQ2) 5-41
Berg connector (male) 3-26
BERR 4-35, 4-39, 4-60, 4-64, 4-69, 4-72, 4-73, 4-88
BERR 4-43, 4-48, 4-49
BG 4-50, 4-65, 4-78
BGACK 4-50, 4-65, 4-78
BGND instruction 3-21
Binary
Bit stuff error (STUFFERR) 7-31
BITERR 7-31
BITS 6-17
Bits per transfer
BITSE 6-23, 6-38
Bit-time 6-50
BIUMCR — BIUSM module configuration register 13-51
BIUSM
BIUTBR — BIUSM time base register 13-52
BKPT 3-20, 4-68
BKPT 4-43
BKPT (TPU asserted) 8-13
debugging mode
clock 6-51
assertion results 4-47
-coded decimal (BCD) 3-4
divider 5-25
-weighted capacitors 5-14
enable (BITSE) 6-23
field (BITS) 6-17
BIUMCR — BIUSM module configuration register
BIUTBR — BIUSM time base register 13-52
freeze 13-50
interrupt vector base number 13-51
LPSTOP 13-50
reading the time base bus 13-52
STOP 13-50
WAIT 13-50
external signal 3-21
serial
sources 3-20
freeze assertion diagram E-17
serial
data word 3-26
I/O block diagram 3-25
interface 3-24
peripheral interface protocol (SPI) 3-25
communication diagram E-17
13-51
MOTOROLA
Index-1

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