MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 237

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
cess
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
Ac-
S
T
S
1
0xYF FC0C
0xYF FC1C
0xYF FC0A
0xYF FC0E
0xYF FC1A
0xYF FC1E
0xYF FC2A
0xYF FC00
0xYF FC02
0xYF FC04
0xYF FC06
0xYF FC08
0xYF FC10
0xYF FC12
0xYF FC14
0xYF FC16
0xYF FC18
0xYF FC20
0xYF FC22
0xYF FC24
0xYF FC26
0xYF FC28
Address
MSB
0
QSMCM Pin Assignment Register (PQS-
Freescale Semiconductor, Inc.
QSM Interrupt Level Register (QILR)
QUEUED SERIAL MULTI-CHANNEL MODULE
See
See
See
QSPI Control Register 3 (SPCR3)
2
For More Information On This Product,
Reserved
Table 6-1 QSMCM Register Map
Table 6-10
Table 6-17
Table 6-4
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QSMCM Module Configuration Register (QSMCMMCR)
Reserved
PAR)
for bit descriptions.
for bit descriptions.
for bit descriptions.
Rev. 25 June 03
See
QSCI1 Control Register (QSCI1CR)
See
See
See
See
See
See
See
See
SCI2 Control Register 0 (SCC2R0)
SCI2 Control Register 1 (SCC2R1)
QSCI1 Status Register (QSCI1SR)
SCI1Control Register 0 (SCC1R0)
SCI1Control Register 1 (SCC1R1)
See
See
QSPI Control Register 0 (SPCR0)
QSPI Control Register 1 (SPCR1)
QSPI Control Register 2 (SPCR2)
6.6.1 Port QS Data Register (PORTQS)
QSMCM Test Register (QTEST)
SCI1 Status Register (SC1SR)
SCI2 Status Register (SC2SR)
SCI1 Data Register (SC1DR)
SCI2 Data Register (SC2DR)
Table 6-24
Table 6-25
Table 6-26
Table 6-13
Table 6-15
Table 6-16
Table 6-31
Table 6-32
Table 6-3
Table 6-6
QSMCM Port Q Data Register (PORTQS)
Reserved
Reserved
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
QSMCM Data Direction Register (DDRQS)
QSM Interrupt Vector Register (QIVR)
Queued SPI Interrupt Level (QSPI_IL)
See
See
See
See
QSPI Status Register (SPSR)
Table 6-11
Table 6-18
Table 6-5
Table 6-6
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
MOTOROLA
LSB
6-3
15