MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 417

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
12.3.2.1 ROM Array Addressing
12.4 ROM Module Control and Configuration Registers
12.4.1 Module Configuration Register (ROMMCR)
MC68F375
REFERENCE MANUAL
The array may be specified to reside in supervisor space to restrict access to supervi-
sor only, or it may be specified to exist in unrestricted space to allow access by both
user and supervisor programs. The array may also be configured to respond to pro-
gram space accesses only or to both data and program space accesses.
The BIU of the ROM module compares internal address [23:13] of the IMB3 with ROM-
BAH, ROMBAL[23:13]. If they match, the remaining address bits and ISIZ[1:0] are
used to access the ROM location in the array. Function codes are also checked for the
correct access rights. If the array is specified to exist in supervisor space, user
accesses will be ignored allowing an external device to respond to the address. If the
array is specified to exist in unrestricted space, it will respond to both user and super-
visor accesses. If the array is specified to exist in program space only, data space
accesses to the array will be ignored allowing implementation of separate data and
program space address maps."
This section describes the ROM control and configuration registers. Each register field
is described in detail with regard to operation. The ROM module register map is shown
in
The ROM module configuration register is used to control the operation of the ROM
array and provide status information. It also provides the production tester and the cus-
tomer with configuration information.
Table
NOTES:
Access
1. Y = M111, where M is the logic state of the module mapping (MM) bit in the SCIM2E configuration
S
S
S
S
S
S
register (SCIMMCR).
12-1.
0xYF F830,
0xYF F832,
0xYF F834,
0xYF F82A
0xYF F820
0xYF F824
0xYF F826
0xYF F828
0xYF F836
Address
Freescale Semiconductor, Inc.
1
Table 12-1 ROM Module Register Map
For More Information On This Product,
15
Go to: www.freescale.com
MASK ROM MODULE
ROM Bootstrap Information Words (ROMBS[0:4])
ROM Module Configuration Register (ROMMCR)
ROM Base Address High Register (ROMBAH)
ROM Base Address Low Register (ROMBAL)
Rev. 25 June 03
ROM Signature Low Register (SIGLO)
ROM Signature High Register (SIGHI)
See
See
See
See
See
Table 12-2
Table 12-3
Table 12-3
Table 12-3
Table 12-3
8 7
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
MOTOROLA
0
12-3

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