MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 440

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MCSM2CNT — MCSM Counter Register
MCSM11CNT
MCSM2ML — MCSM Modulus Latch Register
MCSM11ML
13.3.10 MCSMCNT — MCSM Counter Register
13.3.11 MCSMML — MCSM Modulus Latch Register
13.4 Single-Action Submodule (SASM)
MC68F375
REFERENCE MANUAL
MSB
MSB
15
15
0
0
RESET:
RESET:
The single action submodule provides an input capture and an output compare for
each of two bidirectional pins. All of the functions associated with one pin comprise a
SASM channel. Each channel includes a 16-bit equality comparator and one 16-bit
register for saving an input capture value or for holding an output compare value. The
input edge detector associated with each pin is programmable to cause the capture
function to occur on the rising or falling edge. The output flip flop is set by the software
to either toggle when an output compare occurs or to transfer a software provided bit
value to the output pin. In either the input capture mode or the output compare mode,
a software interrupt may be programmed to occur for each channel. Software selection
is provided to select which of the two incoming time-base buses is used for input cap-
tures or output compares on each channel. Each channel operates independently.
However, interrupt and interrupt priority logic are shared by both SASM channels. See
Figure 13-4
14
14
0
0
13
13
0
0
for a SASM block diagram.
12
12
0
0
MSB
MSB
Freescale Semiconductor, Inc.
For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
11
11
0
0
10
10
0
0
Go to: www.freescale.com
Rev. 25 June 03
9
0
9
0
8
0
8
0
7
0
7
0
6
0
6
0
5
0
5
0
LSB
LSB
4
0
4
0
3
0
3
0
0xYF F25A
0xYF F25C
0xYF F212
0xYF F214
MOTOROLA
2
0
2
0
1
0
1
0
13-14
LSB
LSB
0
0
0
0