MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 601

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

CIRL 8-14
CISR 8-8, 8-18
CLKOUT 4-39, 4-55
CLKS 8-12
Clock
clocks
CMFI
CMFI EEPROM configuration register CMFIMCR 10-9
CNRX/TX pins 7-2
Code 7-5
Coherency 5-6, 5-22, 8-4
coherency
COMM D-17
Command
Common in-circuit emulator 3-20
Comparator 5-14
Completed queue pointer (CPTQP) 6-21
Condition code register (CCR) 3-6, 8-5
CONT 6-23
Continue (CONT) 6-23
Continuous transfer mode 6-15
Control registers
Conversion
counter
counter overflow
CPCR — CPSM control register 13-54
CPHA 6-17, 6-34
CPOL 6-17, 6-34
CPR 8-17
CPSM
MC68F375
REFERENCE MANUAL
output timing diagram E-9
block diagram 5-26
frequency 5-26
generation 5-25
output (CLKOUT) 4-39
phase (CPHA) 6-17
polarity (CPOL) 6-17
FCSM 13-6
MCSM 13-11
PWMSM 13-40, 13-48
registers
DASM 13-25–13-28
PWMSM 13-42
RAM 6-22
word pointer (CWP) 5-44
0 (QACR0) 5-37
1 (QACR1) 5-38
2 (QACR2) 5-40
command word table (CCW) 5-1, 5-14
cycle times 5-12
stages 5-47
DASM 13-33
FCSM 13-5
MCSM 13-10
FCSM 13-5
MCSM 13-13
block diagram 13-53
CPCR — CPSM control register 13-54
CMFI EEPROM configuration register (CMFIM-
CR) 10-9
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
INDEX
CPTQP 6-21, 6-24
CPU space 4-84
CPU16 4-86
CPU32 4-20, 4-26, 4-30, 4-37, 4-38, 4-46, 4-55, 4-68,
CPUD 4-66, 4-67
CRCERR 7-31
CSBARBT 4-79
CSBOOT 4-65, 4-73, 4-75, 4-78, 4-80, 4-86
CSE 4-65, 4-68, 4-69, 4-88
CSM 4-65, 4-68
CSPAR 4-65
CWP 5-44
Cyclic redundancy check error (CRCERR) 7-31
DAC 5-1
DASM
freeze 13-53
prescaler division ratio selection 13-54
address encoding 4-43
cycles 4-42, 4-84
encoding for interrupt acknowledge 4-85
read cycle 4-71
address registers/address organization in 3-5
addressing modes 3-9
block diagram 3-2
data registers 3-4
development support 3-18
exception 4-55
exception processing 3-16
generated message encoding 3-26
instructions 3-10
loop mode 3-15
memory organization 3-7
processing states 3-9
reference manual 3-1
register
registers 3-2
virtual memory 3-9
reset values 4-87
block diagram 13-24
changing mode 13-25, 13-26
clock divide ratio 13-33
coherency 13-25–13-28
4-70, 4-79, 4-86
data organization 3-5
LPSTOP 3-15
MOVEC 3-7
MOVES 3-7
special control instructions 3-15
table lookup and interpolate (TBL) 3-15
umimplemented MC68020 instructions 3-10
model 3-3
alternate function code registers (SFC/DFC) 3-7
condition code register (CCR) 3-6, 4-70
control registers 3-6
program counter (PC) 3-1
stack pointer (SP) 3-1
status register (SR) 3-6
vector base register (VBR) 3-7
–D–
MOTOROLA
Index-3