MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 371

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
10.1 Overview
10.1.1 Overview Description
MC68F375
REFERENCE MANUAL
The CDR MoneT FLASH for the IMB3 (CMFI) is designed to be used with the Inter-
module Bus 3 (IMB3) and consequently any bus master capable of operating the
IMB3.
The CMFI array uses the MOTOROLA 1 transistor (MoneT) bit cell configured as 256
Kbytes (262,144 bytes) of non-volatile memory (NVM). The CMFI array is divided into
eight 32-Kbyte (32,768-bytes) array blocks.
The primary function of the CMFI EEPROM module is to serve as electrically program-
mable and erasable NVM to store program instructions and/or data. It is a class of non-
volatile solid state silicon memory devices consisting of an array of isolated elements,
a means for selectively adding and removing electrical charge to the elements and a
means of selectively sensing the stored charge in the elements. When power is
removed from the device, the stored charge of the isolated elements will be retained.
The CMFI EEPROM module is arranged into two major sections as shown in
10-1. The first section is the MoneT array used to store system programs and data.
The second section is the bus interface unit (BIU) that controls access and operation
of the CMFI array through a standard IMB3 interface and external signals for:
• E
• E
• V
• V
and is always enabled.)
PEB0
PP
DDF
PEE
– Supplying program and erase power.
- Flash operating voltage
- Program enable (note: The EPEE pin is not available on the MC68F375
– Block 0 protect signal
CDR MoneT FLASH FOR THE IMB3 (CMFI)
Freescale Semiconductor, Inc.
CDR MoneT FLASH FOR THE IMB3 (CMFI)
For More Information On This Product,
Go to: www.freescale.com
SECTION 10
Rev. 25 June 03
MOTOROLA
Figure
10-1

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