MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 391

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

10.4.9 A Technique to Determine SCLKR, CLKPE, and CLKPM
MC68F375
REFERENCE MANUAL
PE
NOTES:
0
1
The value of SCLKR is forced to the user defined value in the corresponding shadow
information words on master reset. When SCLKR[2:0] = 000, the pulse width timer
control will not terminate the program or erase pulse therefore the user must clear EHV
via a software write.
All of the exponents are shown in
1. CMF clock frequency after SCKLR scaling. Example: A 32 MHz system clock scaled by 3 (SCLKR[0:2] = 0b100)
The value of CLKPE[1:0] is forced to the user defined value in the corresponding
shadow information words on master reset, as is the value of CLKPM[6:0].
The following example determines the values of the SCLKR, CLKPE, and CLKPM
fields for a 51.4 S pulse program pulse, PE=0, in a system with a 33.0 MHz system
clock.
In this example system clock frequency = 33.0 MHz; the system clock period is there-
fore 30.3 nS.
results in an equivalent CMF clock of 10 MHz.
CLKPE[0:1
1. Determine SCLKR:
2. Determine CLKPE:
00
01
10
11
00
01
10
11
From
From
]
Table 10-12 Clock Period Exponent and Pulse Width Range
Never stop or alter the IMB3 clock frequency during program or erase
operation. Changing the clock frequency during program or erase will
result in inaccurate pulse widths and variations in the charge trans-
ferred to the array bits.
Table 10-11
Table 10-12
Exponent
(N)
15
16
17
18
5
6
7
8
Freescale Semiconductor, Inc.
CDR MoneT FLASH FOR THE IMB3 (CMFI)
For More Information On This Product,
2
16.384 ms
32.768 ms
4.096 ms
8.192 ms
N
8 MHz
•1.25E-7
16 µs
32 µs
4 µs
8 µs
a 51.4 µS program pulse, PE=0, can be generated by expo-
a 33.0 MHz system clock uses SCLKR[0:2]=100, R=3.
Minimum Pulse Width
1
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3.2 µs
6.4 µs
12.8 µs
25.6 µs
3.28 ms
6.55 ms
13.11 ms
26.21 ms
Rev. 25 June 03
Table
10 MHz
2
N
•1E-7
Pulse Width Range for all System Clock
Frequencies from 8.0 MHz to 33.0 MHz.
WARNING
1
10-12.
2
2.7 µs
5.3 µs
10.7 µs
21.3 µs
2.73 ms
5.46 ms
10.92 ms
21.85 ms
N
12 MHz
•0.833E-7
1
2
512 µs
1.024 ms
2.048 ms
4.096 ms
524.29 ms
1.05 s
2.10 s
4.19 s
N
8 MHz
•1.25E-07
Maximum Pulse Width
1
409.6 µs
819.2 µs
1.6384 ms
3.2768 ms
419.43 ms
838.86 ms
1.68 s
3.35 s
10 MHz
2
N
•1E-7
1
MOTOROLA
2
341.3 µs
682.7 µs
1.365 ms
2.731 ms
349.5 ms
699.1 ms
1.398 s
2.796 s
N
12 MHz
•0.833E-7
10-21
1