MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 476

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

PWM5C — PWM Counter Register
PWM6C
PWM7C
PWM8C
13.8 Bus Interface Unit Submodule (BIUSM)
13.8.1 Freeze Action on the BIUSM
13.8.2 LPSTOP Action on the BIUSM
13.8.3 STOP and WAIT Action on the BIUSM
13.8.4 BIUSM Registers
MC68F375
REFERENCE MANUAL
MSB
15
0
RESET:
The bus interface unit submodule (BIUSM) allows all the CTM9 submodules to com-
municate to the IMB3 via the SMB (sub module bus).
When the IMB freeze condition is detected, the FRZ bit in the BIUSM module config-
uration register determines whether or not the freeze condition is passed on to the
other CTM submodules. If FRZ = 0, the freeze condition is ignored; if FRZ = 1, the
BIUSM passes the FREEZE signal from the IMB through to the CTM submodules.
Each CTM submodule then reacts to the FREEZE signal as defined by its own internal
circuitry and control bits.
When the CPU is stopped by an LPSTOP instruction (from CPU32 or CPU16), the sys-
tem clock (f
the CTM, until the low-power STOP mode is exited.
When the STOP instruction on CPU32 or the WAIT instruction on CPU16 is executed,
only the CPU is stopped; the CTM continues to operate as normal. (To stop the CTM
operation selectively, refer to the description of the STOP bit in
BIUSM Module Configuration
The BIUSM register map comprises four 16-bit register locations. As shown in
13-18, the register block contains the three BIUSM registers and one reserved regis-
ter. The BIUSM register block always occupies the first four register locations in the
CTM register space and cannot be relocated within the CTM structure. All unused bits
and reserved address locations return zero when read by the software. Writing to
unused bits and reserved address locations has no effect.
14
0
13
0
SYS
12
) is stopped, thereby shutting down all dependent modules, including
0
MSB
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
10
0
Go to: www.freescale.com
Register).
9
0
Rev. 25 June 03
8
0
7
0
6
0
5
0
4
0
LSB
13.8.4.1 BIUMCR —
3
0
2
0
0xYF F22E
0xYF F23E
0xYF F236
0xYF F246
MOTOROLA
1
0
Table
13-50
LSB
0
1