MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 515

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

D.1 Overview
MC68F375
REFERENCE MANUAL
The following pages provide brief descriptions of the pre-programmed functions in the
TPU3. For detailed descriptions, refer to the programming note for the individual func-
tion. Motorola Programming Note TPUPN00/D,
TPU Emulation
The TPU3 contains 4 Kbytes of microcode ROM. This appendix defines the functions
that are in the standard ROM on the MC68F375. The TPU3 can have up to 8 Kbytes
of memory and a maximum of four entry tables (see
The TPU3 can address up to 8 Kbytes of memory at any one time. It has 4 Kbytes of
internal ROM, located in banks zero and one, and 6 Kbytes of dual ported SRAM (DP-
TRAM), located in banks zero, one and two. As only one type of memory can be used
at a time, the TPU3 must either use the internal ROM or the SRAM. Functions from
both memory types cannot be used in conjunction.
*The DPTRAM is located at 0x30 2000 until it is switched to emulation mode.
In emulation mode, the DPTRAM is accessible by the TPUs only.
Add - Entry
Add - Entry
Add - Entry
TPUROM
Mode, provides a list of available programming notes.
Code
Entry
Code
Code
Code
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure D-1 TPU3 Memory Map
TPU ROM FUNCTIONS
7FF
0
1FF
3 FF
Go to: www.freescale.com
TPU ROM FUNCTIONS
APPENDIX D
Rev. 25 June 03
Add - Entry
Add - Entry
DPTRAM*
Code
Entry
Code
Code
Using the TPU Function Library and
Figure
1FF
3FF
5 FF
0
D-1).
MOTOROLA
D-1