MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 38

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

1.3.4 Analog Multiplexer – AMUX
1.3.5 Queued Serial Multi-Channel Communications Module – QSMCM
1.3.6 TouCAN Module
1.3.7 Enhanced Time Processing Unit – TPU3
MC68F375
REFERENCE MANUAL
The analog multiplexer (AMUX) submodule expands the channel capacity of the
QADC64 analog-to-digital converter inputs by a maximum of 32 analog channels. 16
analog channels are bonded out on the MC68F375. The AMUX does not have an
intermodule bus (IMB3) interface; control is through the QADC64. Refer to
log Multiplexer
The queued serial multi-channel module (QSMCM) provides the microcontroller unit
(MCU) with three serial communication interfaces divided into three submodules: the
queued serial peripheral interface (QSPI) and two serial communications interfaces
(SCI). These submodules communicate with the CPU via a common slave bus inter-
face unit (SBIU). Refer to
CONVERTER
The QSPI is a full-duplex, synchronous serial interface for communicating with periph-
erals and other MCUs. It is enhanced from the original QSM to include a total of 160
bytes of queue RAM to accommodate more receive, transmit, and control information.
The duplicate, independent, SCIs are full-duplex universal asynchronous receiver
transmitter (UART) serial interface. The original QSM SCI is enhanced by the addition
of an SCI, a common external baud clock source, receive and transmit buffers on one
SCI.
The TouCAN module is a communication controller implementing the CAN protocol. It
contains all the logic needed to implement the CAN2.0B protocol, supporting both
standard ID format and extended ID. The protocol is a CSMA/CD type, with collision
detection without loss, used mainly for vehicle systems communication and industrial
applications. The module contains 16 message buffers used for transmit and receive,
and masks used to qualify the received message ID before comparing it to the receive
buffers. Refer to
The TPU3 is an intelligent, semi-autonomous co-processor designed for timing con-
trol. Operating simultaneously with the CPU, the TPU processes microinstructions,
schedules and processes real-time hardware events, performs input and output, and
accesses shared data without CPU intervention. Consequently, for each timer event
the CPU setup and service time are minimized or eliminated.
The TPU3 can be viewed as a special-purpose microcomputer that performs a pro-
grammable series of two operations, match and capture. Each occurrence of either op-
eration is called an event. A programmed series of events is called a function. TPU3
• The port logic provides up to 8 input-only and 8 bidirectional digital interface pins.
Pins which are used as analog channels should be masked out of the digital data.
MODULE-64.
Submodule.
SECTION 7 CAN 2.0B CONTROLLER
Freescale Semiconductor, Inc.
For More Information On This Product,
OVERVIEW DESCRIPTION
Go to: www.freescale.com
Rev. 25 June 03
SECTION 5 QUEUED ANALOG-TO-DIGITAL
MODULE.
MOTOROLA
5.13 Ana-
1-4