MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 158

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

CSPAR1 — Chip-Select Pin Assignment Register 1
CSPAR0 — Chip-Select Pin Assignment Register 0
MC68F375
REFERENCE MANUAL
MSB
MSB
NOTES:
15
NOTES:
15
0
0
RESET:
0
0
RESET:
1. Refer to
1. The default state of this bit is taken from the listed bit of the data bus during reset.
This register contains seven 2-bit fields that determine the function of corresponding
chip-select pins. Bits [15:14] are not used. These bits always read zero; writes have
no effect. CSPAR0 bit 1 always reads one; writes to CSPAR0 bit 1 have no effect. The
alternate functions can be enabled by data bus mode selection during reset. This reg-
ister may be read or written at any time. After reset, software may enable one or more
pins as discrete outputs.
Table 4-31
CSPAR1 contains five 2-bit fields that determine the functions of corresponding chip-
select pins. Bits [15:10] are reserved. These bits always read zero; writes have no
effect.
can be enabled by data bus mode selection during reset.
14
0
0
14
0
0
DATA2
Table 4-32
13
CS5PA[1:0]
Table 4-28
13
CSPAR0 Field
0
0
NOTES:
1
CSBTPA[1:0]
CSMPA[1:0]
CSEPA[1:0]
CS5PA[1:0]
CS4PA[1:0]
CS3PA[1:0]
CS0PA[1:0]
shows CSPAR0 pin assignments.
1. See
12
1
12
0
0
for CSPAR1 reset state information.
Table 4-34
DATA2
shows CSPAR1 pin assignments, including alternate functions that
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
11
CS4PA[1:0]
Freescale Semiconductor, Inc.
11
0
0
Table 4-31 CSPAR0 Pin Assignments
1
For More Information On This Product,
1
Chip-Select Signal
10
1
10
for pin assignment field encoding.
0
0
CSBOOT
CSM
CSE
CS5
CS3
CS0
DATA2
Go to: www.freescale.com
—
DATA
CS10PA[1:0]
CS3PA[1:0]
9
7
9
1
1
Rev. 25 June 03
8
1
8
1
DATA10
Alternate Signal
DATA
CSEPA[1:0]
CS9PA[1:0]
7
6
7
1
BGACK
1
FC2
FC1
FC0
BG
BR
—
6
1
6
1
DATA10
DATA
CS8PA[1:0]
5
CSMPA[1:0]
5
1
5
1
Discrete Output
4
1
4
1
PC2
PC1
PC0
—
—
—
—
DATA
DATA2
CS7PA[1:0]
4
3
CS0PA[1:0]
1
3
1
2
1
2
1
0xYF FA46
0xYF FA44
MOTOROLA
DATA
CSBTPA[1:0]
CS6PA[1:0]
3
1
1
1
1
DATA0
LSB
LSB
4-76
0
0
1
1