MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 480

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

13.9.2.1 CPCR — CPSM Control Register
CPCR — CPSM Control Register
13.9.3 Clock Sources for the Counter Submodules
MC68F375
REFERENCE MANUAL
MSB
Bit(s)
15:4
15
PRUN
1:0
0
0
RESET:
3
2
The software chooses one of seven clock sources for each counter. Six of them are
prescaler taps derived from the on-chip oscillator. The highest frequency available to
the counter is the MCU system clock divided by 2. Four of the other five taps are binary
divisible from the system clock cycle — divide by 4, 8, 16, and 32. Another input clock
to the counter is a software defined divide by 64, 128, 256, or 512 from the MCU clock.
There is an alternate prescaler option where the MCU clock is divided by 3, 6, 12, 24,
0
1
1
1
1
1
1
1
1
Prescaler Control Register Bits
14
0
0
PSEL[1:0]
Name
PRUN
DIV23
DIV23
—
X
0
0
0
0
1
1
1
1
13
0
0
Reserved
Prescaler running. The PRUN bit is a read/write control bit that allows the software to switch the
prescaler counter on and off. This bit allows the counters in various CTM submodules to be
synchronized.
0 = Prescaler divider is held in reset and is not running.
1 = Prescaler is running.
Divide by 2 or divide by 3 . The DIV23 bit is a read/write control bit that selects the division ratio
of the first prescaler counter. It may be changed by the software at any time and is cleared on
reset.
0 = First prescaler stage divides by 2.
1 = First prescaler stage divides by 3.
prescaler output signal, PCLK6, See
Prescaler division ratio select. These control bits select the division ratio of the programmable
12
0
0
PSEL1
Table 13-22 Prescaler Division Ratio Select
X
0
0
1
1
0
0
1
1
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
Table 13-21 CPCR Bit Settings
PSEL0
10
0
0
X
0
1
0
1
0
1
0
1
Go to: www.freescale.com
9
0
0
PCLK1
Rev. 25 June 03
0
2
2
2
2
3
3
3
3
8
0
0
Table
PCLK2
7
0
0
Description
0
4
4
4
4
6
6
6
6
13-22.
6
0
0
Prescaler Division Ratio
PCLK3
12
12
12
12
0
8
8
8
8
5
0
0
4
0
0
PCLK4
16
16
16
16
24
24
24
24
0
PRUN DIV23
3
0
PCLK5
2
0
32
32
32
32
48
48
48
48
0
0xYF F208
MOTOROLA
PSEL
1
1
0
PCLK6
128
256
512
192
384
768
64
96
0
13-54
PSEL
LSB
0
0
0