MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 337

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
ESTAT — Error and Status Register
7.8.10 Receive Buffer 15 Mask Registers
RX15MSKHI — Receive Buffer 15 Mask Register High
RX15MSKLO — Receive Buffer 15 Mask Register Low
7.8.11 Error and Status Register
MC68F375
REFERENCE MANUAL
MSB
15
Bit(s)
15:14
0
RESET:
13
12
11
10
BITER
9
The receive buffer 15 mask registers have the same structure as the receive global
mask registers and are used to mask buffer 15.
This register reflects various error conditions, general status, and has the enable bits
for three of the TouCAN interrupt sources. The reported error conditions are those
which have occurred since the last time the register was read. A read clears these bits
to zero.
14
0
FORMERR
STUFERR
TXWARN
CRCERR
ACKERR
BITERR
Name
ERR
ACK
13
0
CRC
ERR
12
0
Transmit bit error. The BITERR[1:0] field is used to indicate when a transmit bit error occurs.
Refer to
NOTE: The transmit bit error field is not modified during the arbitration field or the ACK slot
bit time of a message, or by a transmitter that detects dominant bits while sending a passive
error frame.
Acknowledge error. The ACKERR bit indicates whether an acknowledgment has been cor-
rectly received for a transmitted message.
0 = No ACK error was detected since the last read of this register.
1 = An ACK error was detected since the last read of this register.
Cyclic redundancy check error. The CRCERR bit indicates whether or not the CRC of the
last transmitted or received message was valid.
0 = No CRC error was detected since the last read of this register.
1 = A CRC error was detected since the last read of this register.
Message format error. The FORMERR bit indicates whether or not the message format of
the last transmitted or received message was correct.
0 = No format error was detected since the last read of this register.
1 = A format error was detected since the last read of this register.
Bit stuff error. The STUFFERR bit indicates whether or not the bit stuffing that occurred in
the last transmitted or received message was correct.
0 = No bit stuffing error was detected since the last read of this register.
1 = A bit stuffing error was detected since the last read of this register.
Transmit error status flag. The TXWARN status flag reflects the status of the TouCAN trans-
mit error counter.
0 = Transmit error counter
1 = Transmit error counter
FORM
ERR
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
Table
Table 7-21 ESTAT Bit Settings
STUF
ERR
CAN 2.0B CONTROLLER MODULE
10
F
0
7-22.
Go to: www.freescale.com
WARN
TX
9
0
Rev. 25 June 03
WARN
RX
8
0
96.
96.
IDLE
7
0
Description
RX
TX/
6
0
5
0
FCS
4
0
3
0
0
BOFF
INT
2
0
0xYF F0A0
0xYF F09A
0xYF F098
MOTOROLA
ERR
INT
1
0
WAKE
LSB
7-31
INT
0
0

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