MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 996

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PCI Bus Interface
17-12
0x00C–
0xC14–
0xC34–
0xC54–
0xBFC
0xC0C
0xC1C
0xC2C
0xC3C
0xC4C
0xC5C
0xC6C
Offset
0xC00
0xC04
0xC08
0xC10
0xC20
0xC24
0xC28
0xC30
0xC40
0xC44
0xC48
0xC50
0xC60
0xC64
0xC68
0xC70
0x004
0x008
CFG_DATA—PCI configuration data
INT_ACK—PCI interrupt acknowledge
Reserved
POTAR0—PCI outbound window 0 (default) translation address
register
POTEAR0—PCI outbound window 0 (default) translation extended
address register
Reserved
Reserved
POWAR0—PCI outbound window 0 (default) attributes register
Reserved
POTAR1—PCI outbound window 1 translation address register
POTEAR1—PCI outbound window 1 translation extended address
register
POWBAR1—PCI outbound window 1 base address register
Reserved
POWAR1—PCI outbound window 1 attributes register
Reserved
POTAR2—PCI outbound window 2 translation address register
POTEAR2—PCI outbound window 2 translation extended address
register
POWBAR2—PCI outbound window 2 base address register
Reserved
POWAR2—PCI outbound window 2 attributes register
Reserved
POTAR3—PCI outbound window 3 translation address register
POTEAR3—PCI outbound window 3 translation extended address
register
POWBAR3—PCI outbound window 3 base address register
Reserved
POWAR3—PCI outbound window 3 attributes register
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 17-3. PCI Memory-Mapped Register Map (continued)
PCI ATMU Registers—Outbound and Inbound
0xC00–0xC3C–Outbound Window 0 (default)
Register
0xC20–0xC3C—Outbound Window 1
0xC40–0xC5C—Outbound Window 2
0xC60–0xC7C—Outbound Window 3
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
—
R
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8004_401F
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
17.3.1.1.2/17-15
17.3.1.1.3/17-15
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.4/17-18
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.3/17-17
17.3.1.2.4/17-18
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.3/17-17
17.3.1.2.4/17-18
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.3/17-17
17.3.1.2.4/17-18
Section/page
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