MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1273

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x0_8DD4–
0x0_8DCC
0x0_8DDC
0x0_8DC0
0x0_8DC4
0x0_8DC8
0x0_8DD0
0xDB4–
0xC74–
0xC94–
0xDAC
0xDBC
0xC6C
0xC7C
0xC8C
0xD9C
0xDA0
0xDA4
0xDA8
0xDB0
0xC60
0xC64
0xC68
0xC70
0xC80
0xC84
0xC88
0xC90
Offset
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
POTAR3—PCI outbound window 3 translation address
register
POTEAR3—PCI outbound window 3 translation extended
address register
POWBAR3—PCI outbound window 3 base address register
Reserved
POWAR3—PCI outbound window 3 attributes register
Reserved
POTAR4—PCI outbound window 4 translation address
register
POTEAR4—PCI outbound window 4 translation extended
address register
POWBAR4—PCI outbound window 4 base address register
Reserved
POWAR4—PCI outbound window 4 attributes register
Reserved
PITAR3—PCI inbound window 3 translation address register
Reserved
PIWBAR3—PCI inbound window 3 base address register
PIWBEAR3—PCI inbound window 3 base extended address
register
PIWAR3—PCI inbound window 3 attributes register
Reserved
PITAR2—PCI inbound window 2 translation address register
Reserved
PIWBAR2—PCI inbound window 2 base address register
PIWBEAR2—PCI inbound window 2 base extended address
register
PIWAR2—PCI inbound window 2 attributes register
Reserved
0x0_8DC0–0x0_8DDC–Inbound Window 2
Table B-1. Memory Map (continued)
Register
0xC60–0xC7C—Outbound Window 3
0xC80–0xC9C—Outbound Window 4
0xDA0–0xDBC–Inbound Window 3
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
—
—
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.3/17-17
17.3.1.2.4/17-18
17.3.1.2.1/17-16
17.3.1.2.2/17-16
17.3.1.2.3/17-17
17.3.1.2.4/17-18
17.3.1.3.1/17-20
17.3.1.3.2/17-20
17.3.1.3.3/17-21
17.3.1.3.4/17-21
17.3.1.3.1/17-20
17.3.1.3.3/17-21
17.3.1.3.4/17-21
Section/Page
B-7