MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1210
![MPU POWERQUICC III 783-PBGA](/photos/37/62/376266/mpc8544e_image_sml.jpg)
MPC8544VTALF
Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
Specifications of MPC8544VTALF
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Device Performance Monitor
20.3.3
This section describes the PMCs in detail.
20.3.3.1
PMC0–PMC9 are used to count events selected by the performance monitor local control registers. PMC0,
shown in
clock cycles. PMC0 upper represents the upper 32 bits of counter 0, and PMC0 lower represents the lower
32 bits.
20-10
21–23
24–25
26–31
Bits
Offset 0xE_101C
Reset
W
R
Figure
THRESHOLD
0
Counter Registers
TBMULT
Name
Performance Monitor Counters (PMC0–PMC9)
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Because accessing a PMC manually has priority over incrementing it due to
event counting, writing a PMC while it is counting may affect the count.
Likewise, writing a performance monitor control register while its target
counter is counting may also affect the count.
—
20-7, is associated with two 32-bit registers that form a 64-bit counter designated to count
Figure 20-7. Performance Monitor Counter Register 0 (PMC0)
Threshold and burstiness multiplier. Threshold events are counted when the event duration
exceeds a specified threshold value. The threshold is scaled based on the TBMULT
settings.TBMULT is not used to scale the threshold value for quantity threshold events. The burst
distance for burstiness counting is also scaled using the TBMULT settings. For all events that scale
the threshold, the threshold field is multiplied by the factors shown below (ranging from 1 to 128).
000 1
001 2
010 4
011 8
100 16
101 32
110 64
111 128
Reserved
Threshold. Only events whose (number of) occurrences exceed this value are counted. By varying
the threshold value, software can characterize the events subject to the threshold. For example, if
PMC2 counts eTSEC BD read latencies for which the duration exceeds the threshold, software can
obtain the distribution of eTSEC BD read latencies for a given program by monitoring the program
using various threshold values.
Table 20-6. PMLCB n Field Descriptions (continued)
PMC0 upper
NOTE
31
All zeros
0xE_1018
Description
32
PMC0 lower
Freescale Semiconductor
Access: Read/Write
63
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