MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1008

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PCI Bus Interface
For an inbound configuration write transaction with a parity error, the device always updates the register
access and generates the error interrupt if the interrupt enabled bit is set.
See
17.3.1.4.1
Table 17-15
core_fault_in, which causes the core to generate a machine check interrupt, unless it is disabled (by
clearing HID1[RFXE]). If RFXE is zero and an error occurs, the appropriate parity detect and master-abort
bits in ERR_DR must be cleared and the appropriate enable bits in ERR_EN must be set to ensure that an
interrupt is generated. See
17-24
Section 17.4.2.13, “PCI Error Functions,”
Offset 0xE00
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
1–20 —
Bits
21
22
23
0
describes ERR_DR fields. Note that uncorrectable read errors may cause the assertion of
Multiple PCI
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Trgt PERR
PCI Error Detect Register (ERR_DR)
Errors
Multiple PCI errors 0 Multiple PCI errors of the same type were not detected (write-1-to-clear)
Addr Parity error
Rcvd SERR error
Mstr PERR error
error
w1c
w1c
16
24
0
8
Name
Mstr abort
Section 6.10.2, “Hardware Implementation-Dependent Register 1 (HID1).”
Figure 17-15. PCI Error Detect Register (ERR_DR)
error
w1c
25
1
Table 17-15. ERR_DR Field Descriptions
1 Multiple PCI errors of the same type were detected
Reserved
Address parity error (write-1-to-clear)
Received SERR error (write-1-to-clear)
Master PERR error (write-1-to-clear)
Trgt abort
error
w1c
26
—
OWMSV
for more detail on error handling.
error
w1c
27
All zeros
All zeros
All zeros
All zeros
—
ORMSV
Description
error
w1c
20
28
—
Addr Parity
IRMSV
error
error
w1c
w1c
21
29
Rcvd SERR
SCM error
error
w1c
w1c
22
30
Freescale Semiconductor
Access: w1c
Mstr PERR
TOE error
error
w1c
w1c
15
23
31
7