MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1226

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Device Performance Monitor
20-26
PEX Symbol Disparity Error
PEX Symbol Decode Error
Bank 1 hits (chip-select)
Bank 2 hits (chip-select)
Bank 3 hits (chip-select)
Bank 4 hits (chip-select)
Bank 5 hits (chip-select)
Bank 6 hits (chip-select)
Bank 7 hits (chip-select)
Bank 8 hits (chip-select)
Requests granted to ECM port
Cycles atomic reservation for ECM port
is enabled
Atomic reservation time-outs for ECM
port
Cycles a read is taking in GPCM
Cycles a read is taking in UPM
Cycles a read is taking in SDRAM
Cycles a write is taking in GPCM
Cycles a write is taking in UPM
Cycles a write is taking in SDRAM
SDRAM bank misses
SDRAM page misses
Core instruction accesses to L2 that hit
Core instruction accesses to L2 that
miss
Core data accesses to L2 that hit
Core data accesses to L2 that miss
Non-core burst write to L2 (cache
external write or SRAM)
Non-core non-burst write to L2
Event Counted
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 20-10. Performance Monitor Events (continued)
Number
C1:115
C2:120
C3:119
C4:118
C5:112
C6:117
C7:114
C8:114
C2:121
C4:119
C6:118
C1:117
C2:122
C3:121
C4:120
C5:114
C6:119
C7:115
C8:115
C2:123
C4:121
C5:115
C6:120
Ref:22
Ref:23
C8:94
C9:71
L2 Cache/SRAM Events
Local Bus Events
Number of times a receive PEX Symbol Disparity Error was
detected
Number of times an unrecognizable PEX Symbol (Decode
Error) was received and detected
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Description of Event Counted
Freescale Semiconductor