MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1200

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Global Utilities
19.5.2
When configured as general-purpose I/O signals, software can read inputs by reading the associated GPIO
data register (See
can be set by writing the to the associated GPIO data register (See
Output Data Register
I/O signals, see
As well, a general purpose input register is loaded with the values of the local bus address/data pins at the
negation of HRESET. See
(GPPORCR),” for additional details.
19.5.3
The MPC8544E has very little signal multiplexing. Two sets of DMA channel triggering signals can
alternately be placed on other signals as follows:
For details regarding the selection of the alternate function DMA trigger, see
Function Signal Multiplex Control Register (PMUXCR).”
19-34
•
•
LCS[5:7] are multiplexed with DMA channel 2 DMA_DREQ2, DMA_DACK2, and
DMA_DONE2.
IRQ[9:11] are multiplexed with DMA channel 3 DMA_DREQ3, DMA_DACK3, and
DMA_DDONE3.
General-Purpose I/O Signals
Interrupt and Local Bus Signal Multiplexing
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Unused IRQn signals may also be used as general-purpose inputs. The
external interrupt summary register (ERQSR) can be used to monitor these
signals. See
(ERQSR),”
Section 19.4.1.8, “General-Purpose I/O Control Register (GPIOCR).”
Section 19.4.1.10, “General-Purpose Input Data Register
(GPOUTDR).”). For details regarding the control and status of the general-purpose
Section 19.4.1.7, “General-Purpose POR Configuration Register
for more information.
Section 10.3.3.1, “External Interrupt Summary Register
NOTE
Section 19.4.1.9, “General-Purpose
(GPINDR).”). Output values
Section 19.4.1.11, “Alternate
Freescale Semiconductor