MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 320

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

e500 Coherency Module
8.2.1.8
The ECM error low address capture register (EELADR) is shown in
Table 8-9
8-8
Offset 0x0_1E10
Reset
11–15
17–20
21–30
Bits
W
16
31
R
0–31
Bits
0
describes EELADR fields.
SRC_ID
TTYPE
Name
VAL
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
—
ECM Error Low Address Capture Register (EELADR)
ADDR
Name
Figure 8-9. ECM Error Low Address Capture Register (EELADR)
Source ID. Specifies the source device mastering the transaction.
00000 PCI interface
00001 PCI Express 2
00010 PCI Express 1
00011 PCI Express 3
00100–01001 Reserved
01010 Boot sequencer
01011 Reserved
01100 Reserved
01101–01111 Reserved
10000 Processor (instruction)
10001 Processor (data)
10010–10011 Reserved
Reserved
Transaction type. Defined as follows:
0000 Write
0001 Reserved
0010 Write with allocate
0011 Write with allocate with lock
0100 Address only transaction
0101–0111Reserved
1000 Read
Reserved
Register data valid.
0 ECM error attribute capture register does not contain valid information.
1 ECM error attribute capture register contains valid information.
Table 8-8. EEATR Field Descriptions (continued)
Address. Specifies the lower-order 32 bits of the 36-bit address of the transaction.
Qualified by EEATR[VAL].
Table 8-9. EELADR Field Descriptions
All zeros
ADDR
Description
Description
10100 Reserved
10101 DMA
10110 Reserved
10111 SAP
11000 eTSEC1
11001 Reserved
11010 eTSEC3
11011 Reserved
11100 Reserved
11101 Reserved
11110 Reserved
11111 Reserved
1001 Read with unlock
101x Reserved
1100 Read with clear atomic
1101 Read with set atomic
1110 Read with decrement atomic
1111 Read with increment atomic
Figure
8-9.
Freescale Semiconductor
Access: Read only
31