MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1260

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Debug Features and Watchpoint Facility
Figure 21-23
Table 21-30
110.
21-30
Reset
W
R
10–14
15–33
34–63 PEXADDR Address bits 31–2
Bits
10–11
12–31
32–63 PCIADDR Address bits 0–31
0–4
5–9
Bits
0–4
5–9
PEXTT
0
describes the fields of PCI Express trace buffer entries when TBCR1[IFSEL] = 100 or 101 or
PEXSID
4
PCISID
PEXTT
PCIBC
PCIBC
PCITT
Name
shows the PCI Express trace buffer entry format when TBCR1[IFSEL] = 100 or 101 or 110.
Name
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
PEXSID
—
5
Transaction type. Specifies the transaction type as shown in
of all zeros maps to write.
Source ID. Identifies the source of the transaction as shown in
of 010101 identifies DMA as the transaction source.
Byte count. The size of the transaction.
00 32 bytes
01 8 bytes
10 16 bytes
11 24 bytes
Reserved
9
Table 21-30. PCI Express Trace Buffer Entry Field Descriptions
Transaction type. Specifies the transaction type as shown in
of all zeros maps to write.
Source ID. Identifies the source of the transaction as shown in
of 010101 identifies DMA as the transaction source. For responses, this corresponds to
Requestor’s ID’s bus number bits 3–7.
Byte count. The size of the transaction.
00000 4 bytes
00001 8 bytes
00010 12 bytes
...
11111 256 bytes
Reserved
10
PEXBC
Table 21-29. PCI Trace Buffer Entry Field Descriptions
14
Figure 21-23. PCI Express Trace Buffer Entry
15
(TBCR1[IFSEL] = 100 or 101 or 110)
(TBCR1[IFSEL] = 010)
—
All zeros
33
34
Function
Function
Table
Table
Table
Table
21-12. For example, a value
PEXADDR
21-26. For example, a value
21-12. For example, a value
21-26. For example, a value
Freescale Semiconductor
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