MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1265

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3.10.18/18-94
19.3.1/19-2
19.3.2/19-2
19.4/19-3
19.4.1/19-4
20.4.7/20-16
21.3.1.4/21-14
Appendix B/B-1
Index
Freescale Semiconductor
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Clarified that the reset value of the configuration ready register is defined during
POR configuration.
In
In
control register 1 (SRDS1CR1), and SerDes 2 control register 1 (SRDS2CR1).
Also, renamed SRDS2CR to SRDS2CR3.
Added
Section 19.4.1.24, “SerDes 1 Control Register 1 (SRDS1CR1),”
Section 19.4.1.25, “SerDes 2 Control Register 1 (SRDS2CR1).”
Added
on-chip network being counted twice.
Added
In
well as in footnote 6.
Added chapter numbers.
Table 19-1
Table
Table
Section 19.4.1.6, “POR Device Status Register 2
Table
Table
B-1, changed “eTSEC2” to “eTSEC3” in the eTSEC register section, as
19-3, added POR I/O device status register 2 (PORDEVSR2), SerDes 1
20-10. Also added a note about events counted from peripherals on
21-12.
and
Table
19-2, changed GPOUT[24:31] to GPOUT[0:7].
(PORDEVSR2),”
and
Revision History
A-3