MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 522

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Security Engine (SEC) 2.1
12.4.3.1
Shown in
The mode register is cleared when the AFEU is reset or re-initialized. Setting a reserved mode bit generates
a data error. If the mode register is modified during processing, a context error is generated.
12.4.3.2
In the default mode of operation, the host provides the key and key size to the AFEU. The initial memory
values in the S-box are permuted with the key to create new S-box values, which are used to encrypt the
plaintext.
If the prevent permute mode bit is set, the AFEU does not require a key. Rather, the host writes the context
to the AFEU and message processing occurs using the provided context. This mode is used to resume
processing of a message using the already permuted S-box. The context may be written through the FIFO
if the context source mode bit is set. The AFEU context is 259 bytes long, and must be in the format
provided by the dump context function. (See
12.4.3.2.1
This mode may be independently specified in addition to host-provided context mode. In this mode, once
message processing is complete and the output data is read, the AFEU will make the current context data
available for reads via the output FIFO. The AFEU context is 259 bytes long.
12-42
Address AFEU 0x3_8000
Reset
W
R
0
Figure
AFEU Mode Register (AFEUMR)
Host-Provided Context via Prevent Permute
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Dump Context
After the initial key permute to generate a context for an AFEU encrypted
session, all subsequent messages will re-use that context, such that it is
loaded, modified during the encryption, and unloaded, similar to the use of
a CBC initialization vector in DES operations. A new context is generated
(via key permute) according to a re-keying interval specified by the security
protocol. Context should never be loaded to encrypt a message if a key is
loaded and permuted at the same time.
12-21, the AFEU mode register contains three bits which are used to program the AFEU.
Figure 12-21. AFEU Mode Register
—
Section 12.4.3.2.1, “Dump
NOTE
All zeros
Context.”)
55 56
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Access: Read/Write
—
60 61
CS DC PP
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