MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 787

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
16–23
Bits
10
11
12
13
14
15
24
25
26
27
28
29
9
Name
EN0
EN1
EN2
EN3
EN4
EN5
EX1
EX2
EX3
EX4
EX5
EX6
EX7
—
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Receive queue 1 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 2 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 3 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 4 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 5 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 6 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Receive queue 7 extract enable.
0 Data transferred by DMA to this RxBD ring is not extracted to cache.
1 Data transferred by DMA to this RxBD ring undergoes extraction according to ATTR register.
Reserved
Receive queue 0 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Receive queue 1 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Receive queue 2 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Receive queue 3 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Receive queue 4 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Receive queue 5 enable.
0 RxBD ring is not queried for reception. In effect the receive queue is disabled.
1 RxBD ring is queried for reception.
Table 15-29. RQUEUE Field Descriptions (continued)
Description
Enhanced Three-Speed Ethernet Controllers
15-55