MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1192

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Global Utilities
19.4.1.26 SerDes 2 Control Register 3 (SRDS2CR3)
Shown in
frequency.
Table 19-29
19-26
Offset 0xE_0F18
Reset
Reset
20–23
24–31
Bits
W
W
R
R
13–31
0–11
Bits
12
16
0
0
0
Figure
describes the bit settings of SRDS2CR3.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
0
0
SRDS_SGMII
XMITEQCD
_REF_CLK
19-26, SRDS2CR3 contains the control bit reflecting SerDes 2 SGMII reference clock
Name
Name
—
—
—
0
1
Figure 19-26. SerDes 2 Control Register 3 (SRDS2CR3)
Table 19-28. SRDS2CR1 Field Descriptions (continued)
0
1
Reserved
Select SGMII SerDes reference clock (See
Clock
0 100 MHz reference clock to the SGMII SerDes block.
1 125 MHz reference clock to the SGMII SerDes block.
Reserved
Transmit equalization selection bus for SerDes 2 lanes c and d (SD2_RX/TX[2:3])
Default value = 4’b0100 (SGMII)
MSB (bit 20) is the differential peak-to-peak amplitude selection:
0 = Vdd-diff-pk=pk
1 = 5/6 Vdd-diff-pk=pk
LSBs (bits 21:23) are the equalization amplitude selection:
000 = No equalization
001 = 1.09x rel.amplitude
010 = 1.2x rel.amplitude
011 = 1.33x rel.amplitude
100 = 1.5x rel.amplitude
101 = 1.71x rel.amplitude
110 = 2.0x rel.amplitude
111 = reserved
Reserved
Table 19-29. SRDS2CR3 Field Descriptions
0
0
Configuration.)
0
1
—
0
0
0
0
—
0
0
Description
Description
0
0
Section 4.4.3.15, “SGMII SerDes Reference
0
0
11
0
0
SRDS_SGMII
_REFCLK
12
n
0
Freescale Semiconductor
Access: Read/Write
13
0
0
—
0
0
15
31
0
0