MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 60

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure
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16-25
16-26
16-27
16-28
17-1
17-2
17-3
17-4
17-5
17-6
17-7
17-8
17-9
17-10
17-11
17-12
17-13
17-14
17-15
17-16
17-17
17-18
17-19
17-20
17-21
17-22
17-23
17-24
17-25
17-26
17-27
17-28
17-29
17-30
17-31
17-32
17-33
17-34
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17-36
17-37
lx
DMA Transaction Flow with DMA Descriptors ................................................................ 16-36
List Descriptor Format ........................................................................................................ 16-37
Link Descriptor Format....................................................................................................... 16-37
DMA Data Paths ................................................................................................................. 16-39
PCI Controller Block Diagram ............................................................................................. 17-2
PCI Interface External Signals.............................................................................................. 17-6
PCI CFG_ADDR Register .................................................................................................. 17-14
PCI CFG_DATA Register ................................................................................................... 17-15
PCI INT_ACK Register ...................................................................................................... 17-15
PCI Outbound Translation Address Registers (POTARn) .................................................. 17-16
PCI Outbound Translation Extended Address Registers (POTEARn) ............................... 17-17
PCI Outbound Window Base Address Registers (POWBARn) ......................................... 17-17
PCI Outbound Window 0 (Default) Attributes Register (POWAR0) ................................. 17-18
PCI Outbound Window 1–4 Attributes Registers (POWAR1–POWAR4) ......................... 17-18
PCI Inbound Translation Address Registers (PITARn) ...................................................... 17-20
PCI Inbound Window Base Address Registers................................................................... 17-21
PCI Inbound Window Base Extended Address Registers (PIWBEARn) ........................... 17-21
PCI Inbound Window Attributes Registers......................................................................... 17-22
PCI Error Detect Register (ERR_DR) ................................................................................ 17-24
PCI Error Capture Disable Register (ERR_CAP_DR) ....................................................... 17-25
PCI Error Enable Register (ERR_EN)................................................................................ 17-26
PCI Error Attributes Capture Register (ERR_ATTRIB)..................................................... 17-27
PCI Error Address Capture Register (ERR_ADDR) .......................................................... 17-28
PCI Error Extended Address Capture Register (ERR_EXT_ADDR) ................................ 17-28
PCI Error Data Low Capture Register (ERR_DL) ............................................................. 17-29
PCI Error Data High Capture Register (ERR_DH) ............................................................ 17-29
PCI Gasket Timer Register (GAS_TIMR).......................................................................... 17-29
Common PCI Configuration Header................................................................................... 17-30
PCI Vendor ID Register ...................................................................................................... 17-30
PCI Device ID Register....................................................................................................... 17-31
PCI Bus Command Register ............................................................................................... 17-31
PCI Bus Status Register ...................................................................................................... 17-33
PCI Revision ID Register.................................................................................................... 17-34
PCI Bus Programming Interface Register........................................................................... 17-34
PCI Subclass Code Register................................................................................................ 17-35
PCI Bus Base Class Code Register ..................................................................................... 17-35
PCI Bus Cache Line Size Register...................................................................................... 17-35
PCI Bus Latency Timer Register ........................................................................................ 17-36
PCI Configuration and Status Register Base Address Register (PCSRBAR) .................... 17-37
32-Bit Memory Base Address Register .............................................................................. 17-37
64-Bit Low Memory Base Address Register ...................................................................... 17-37
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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