MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 564

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Security Engine (SEC) 2.1
12.4.7.6
The KEU interrupt status register tracks the state of possible errors, provided those errors are not masked,
via the KEU interrupt control register. The definition of each bit in the KEU interrupt status register is
shown in
Table 12-47
12-84
59-60
Address KEU 0x3_E030
0–48
Bits
Bits
61
62
63
49
50
Reset
W
R
Signal
Name
ICCR Integrity check comparison result.
0
ICE
RD
ID
IE
—
—
Figure
describes the KEU interrupt status register signals.
KEU Interrupt Status Register (KEUISR)
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
00 No integrity check comparison was performed.
01 The integrity check comparison passed.
10 The integrity check comparison failed.
11 Reserved
Note: A passed or failed result is generated only if ICV checking is enabled and the algorithm selected is F9.
Interrupt error. Reflects the state of the ERROR interrupt signal, as sampled by the controller interrupt status
register
0 KEU is not signaling error
1 KEU is signaling error
Interrupt done. Reflects the state of the DONE interrupt signal, as sampled by the controller interrupt status
register
0 Processing not done
1 All bytes processed
Reset done. Indicates when the KEU has completed its reset sequence, as reflected in the signal sampled by
the appropriate channel.
0 Reset in progress
1 Reset done
Reserved
Integrity check error.
0 No error detected
1 Integrity check error detected. An ICV check was performed on an F9 result and the supplied ICV did not
Reserved
12-62.
match the one computed by the KEU.
—
Table 12-46. KEU Status Register Field Descriptions (continued)
(Section 12.6.5.3, “Interrupt Status Register
(Section 12.6.5.3, “Interrupt Status Register
Table 12-47. KEU Interrupt Status Register Field Descriptions
48
Figure 12-62. KEU Interrupt Status Register
ICE
49
—
50
IE
51
ERE CE KSE DSE DE
52
All zeros
53
Description
Description
(ISR)”).
(ISR)”).
54
55
56
AE OFE IFE
57
58
59
Freescale Semiconductor
—
60
Access: Read-write
IFO OFU —
61
62
63