MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 172

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Reset, Clocking, and Initialization
See
on the default boot ROM values. Also, see
for information on translation of the boot page.
4.4.3.5
The host/agent reset configuration inputs, shown in
or as an agent of a master on another interface. In host mode, the MPC8544E is immediately enabled to
master transactions to the PCI interface. If the MPC8544E is an agent on the PCI or PCI Express interfaces,
then the MPC8544E is disabled from mastering transactions on that interface until the external host
enables it to do so. The external host does this by setting the control registers of the MPC8544E’s interfaces
appropriately. See details in the PCI and PCI Express, programming models described in
Bus Interface,”
Note that the values latched on these signals during POR are accessible through the memory-mapped
PORBMSR (POR boot mode status register) described in
Register (PORBMSR).”
4-14
Functional Signals
LWE[1:3]/LBS[1:3]
Default (111)
Section 2.1, “Local Memory Map Overview and Example,”
Host/Agent Configuration
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
and
Reset Configuration
Chapter 18, “PCI Express Interface Controller,”
cfg_host_agt[0:2]
Name
Table 4-13. Host/Agent Configuration
(Binary)
Value
000
001
010
011
100
101
110
111
Section 4.3.1.3.1, “Boot Page Translation Register (BPTR),”
Reserved
MPC8544E acts as an endpoint on PCI-Express 3 interface. It acts as
the host/root complex for all other PCI/PCI-Express interfaces.
Reserved
MPC8544E acts as an endpoint on PCI-Express 2 interface. It acts as
the host/root complex for all other PCI/PCI-Express interfaces.
Reserved
MPC8544E acts as an endpoint on PCI-Express 1 interface. It acts as
the host/root complex for all other PCI/PCI-Express interfaces.
MPC8544E acts as an agent of an external host on its PCI interface.
It acts as a root complex for all PCI-Express interfaces.
MPC8544E acts as the host processor/root complex on all interfaces
(default).
Table
4-13, configure the MPC8544E to act as a host
Section 19.4.1.2, “POR Boot Mode Status
for an example memory map that relies
respectively.
Meaning
Freescale Semiconductor
Chapter 17, “PCI

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