MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1146

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PCI Express Interface Controller
The fields of the PCI Express IP block core clock ratio register are described in
As an example of programming PEX_GCLK_RATIO, consider the case where the actual PCI Express
controller clock is 250 MHz, the ratio of the actual clock to the default clock (333 MHz) is 3:4. that is, the
default core clock has to be multiplied by the ratio (3/4, which is equivalent to 12/16). So the register has
to be programmed with the decimal numerator value 12 or 0x0000_000C.
18.3.10.15 PCI Express Power Management Timer Register—0x450
The PCI Express power management timer register, shown in
time-in values for entering L0s and L1 power management states.
18-92
Offset 0x440
Offset 0x450
Reset 0
Reset 0
31–6
Bits
5–0
W
W
R
R
31
31
Clock Ratio
0
Figure 18-115. PCI Express IP Block Core Clock Ratio Register (PEX_GCLK_RATIO)
0
Numerator
Figure 18-116. PCI Express Power Management Timer Register (PEX_PM_TIMER)
Name
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
0
0
0
0
0
0
Reserved
The numerator of the ratio of the actual PCI Express controller clock frequency used to the
default core clock frequency of 333 MHz. The denominator of the ratio is fixed at 16.
The default value of this register is 0x10 (16 decimal), which corresponds to a ratio of 1:1 (or
16/16)
0
0
0
0
Table 18-110. PEX_GCLK_RATIO Field Descriptions
24 23
0
0
0
0
0
0
0
0
0
L1_WAIT_PERIOD
1
0
0
0
1
0
0
0
0
0
1
Description
0
1
Figure
0
0
12 11
0
1
0
0
18-116, is used to program the
0
1
0
1
0
1
L0s_TIME_IN
Table
0
1
0
1
6
Freescale Semiconductor
18-110.
0
0
5
1
0
Clock Ratio
Numerator
Access: Mixed
Access: Mixed
0
1
0
1
0
1
0
0
0
0

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