MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 977

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 16-23
Freescale Semiconductor
Source attributes register
Source address
Destination attributes register Contains destination transaction attributes
Destination address
Next link descriptor extended
address
Next link descriptor address
Byte count
Descriptor Field
summarizes the DMA link descriptors.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Contains source transaction attributes
Contains the source address of the DMA transfer. After the DMA controller reads the descriptor
from memory, this field is loaded into the Source address register.
Contains the destination address of the DMA transfer. After the DMA controller reads the
descriptor from memory, this field is loaded into the destination address register.
Points to the next link descriptor in memory. After the DMA controller reads the link descriptor
from memory, this field is loaded into the extended next link descriptor address registers
Points to the next link descriptor in memory. After the DMA controller reads the link descriptor
from memory, this field is loaded into the next link descriptor address registers.
Contains the number of bytes to transfer. After the DMA controller reads the descriptor from
memory, this field is loaded into the byte count register.
Table 16-23. Link DMA Descriptor Summary
Description
DMA Controller
16-35