MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 370

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
MPC8544VTALF
Manufacturer:
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Quantity:
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Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
DDR Memory Controller
Table 9-39
If a transaction request is issued to the DDR memory controller and the address does not lie within any of
the programmed address ranges for an enabled chip select, a memory select error is flagged. Errors are
described in detail in
9-46
1
SDRAM Device
SDRAM Device
This configuration is not supported in 16-bit bus mode.
128 Mbits
128 Mbits
256 Mbits
256 Mbits
512 Mbits
512 Mbits
256 Mbits
256 Mbits
512 Mbits
512 Mbits
64 Mbits
64 Mbits
2 Gbits
2 Gbits
4 Gbits
4 Gbits
2 Gbits
2 Gbits
4 Gbits
4 Gbits
1 Gbit
1 Gbit
1 Gbit
1 Gbit
describe DDR SDRAM device configurations supported by the DDR memory controller.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
1
Section 9.5.12, “Error Management.”
Device Configuration
Device Configuration
Table 9-39. Supported DDR2 SDRAM Device Configurations
128 Mbits x 16
256 Mbits x 16
256 Mbits x 16
128Mbits x 16
256 Mbits x 8
512 Mbits x 8
256 Mbits x 8
512 Mbits x 8
16 Mbits x 16
32 Mbits x 16
128 Mbits x 8
64 Mbits x 16
16 Mbits x 16
32 Mbits x 16
128 Mbits x 8
64 Mbits x 16
4 Mbits x 16
16 Mbits x 8
8 Mbits x 16
32 Mbits x 8
64 Mbits x 8
32 Mbits x 8
64 Mbits x 8
8 Mbits x 8
DDR SDRAM is limited to 30 total address bits.
Row x Column x
Row x Column x
Sub-Bank Bits
Sub-Bank Bits
12 x 10 x 2
13 x 10 x 2
13 x 11 x 2
13 x 10 x 2
14 x 11 x 2
14 x 10 x 2
15 x 11 x 2
15 x 10 x 2
16 x 11 x 2
16 x 10 x 2
13 x 10 x 2
14 x 10 x 2
13 x 10 x 2
14 x 10 x 3
13 x 10 x 3
15 x 10 x 3
14 x 10 x 3
16 x 10 x 3
15 x 10 x 3
12 x 9 x 2
12 x 8 x 2
12 x 9 x 2
13 x 9 x 2
13 x 9 x 2
NOTE
64-Bit Bank Size
64-Bit Bank Size
128 Mbytes
256 Mbytes
128 Mbytes
512 Mbytes
256 Mbytes
512 Mbytes
256 Mbytes
128 Mbytes
512 Mbytes
256 Mbytes
512 Mbytes
64 Mbytes
32 Mbytes
64 Mbytes
2 Gbytes
4 Gbytes
2 Gbytes
2 Gbytes
4 Gbytes
2 Gbytes
1 Gbyte
1 Gbyte
1 Gbyte
1 Gbyte
Four Banks of Memory
Four Banks of Memory
256 Mbytes
128 Mbytes
512 Mbytes
256 Mbytes
512 Mbytes
512 Mbytes
Freescale Semiconductor
16 Gbytes
16 Gbytes
2 Gbytes
4 Gbytes
2 Gbytes
8 Gbytes
4 Gbytes
8 Gbytes
2 Gbytes
4 Gbytes
2 Gbytes
8 Gbytes
4 Gbytes
8 Gbytes
1 Gbyte
1 Gbyte
1 Gbyte
1 Gbyte

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