MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 821

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.5.3.6.18 Receive Code Error Counter (RCDE)
Figure 15-69
Table 15-72
15.5.3.6.19 Receive Carrier Sense Error Counter (RCSE)
Figure 15-70
Table 15-73
Freescale Semiconductor
16–31
16–31
0–15
0–15
Bits
Bits
Offset eTSEC1:0x2_46C8; eTSEC3:0x2_56C8
Offset eTSEC1:0x2_46C4; eTSEC3:0x2_56C4
Reset
Reset
W
W
R
R
RCSE Receive false carrier counter. Counts the number of times that the carrier sense condition was lost or never
Name
RCDE Receive code error counter. Increments each time a valid carrier is present and at least one invalid data
Name
0
0
—
—
describes the fields of the RCDE register.
describes the fields of the RCSE register.
describes the definition for the RCDE register.
describes the definition for the RCSE register.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
asserted when attempting to transmit a frame on a particular interface.
The count represented by an instance of this object is incremented at most once per transmission attempt,
even if the carrier sense condition fluctuates during a transmission attempt. The event is reported along with
the statistics generated on the next received frame, as defined by a 1 on TSEC n _RX_ER and an 0xE on
TSEC n _RXD. Only one false carrier condition can be detected and logged between frames.
Reserved
symbol is detected.
Figure 15-70. Receive Carrier Sense Error Counter Register Definition
Figure 15-69. Receive Code Error Counter Register Definition
—
—
Table 15-72. RCDE Field Descriptions
Table 15-73. RCSE Field Descriptions
All zeros
All zeros
15 16
15 16
Description
Description
Enhanced Three-Speed Ethernet Controllers
RCDE
RCSE
Access: Read/Write
Access: Read/Write
15-89
31
31