MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 748

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
15-16
0x2_4240–
0x2_4308–
0x2_4318–
0x2_4344–
0x2_422C TBASE5*—TxBD base address of ring 5
0x2_423C TBASE7*—TxBD base address of ring 7
0x2_42FC
0x2_430C
0x2_432C
0x2_433C RQFPR*—Receive queue filing table property register
0x2_437C
0x2_438C RBPTR1*—RxBD pointer for ring 1
0x2_439C RBPTR3*—RxBD pointer for ring 3
0x2_43A0 Reserved
0x2_43A4 RBPTR4*—RxBD pointer for ring 4
0x2_4224 TBASE4*—TxBD base address of ring 4
0x2_4228 Reserved
0x2_4230 Reserved
0x2_4234 TBASE6*—TxBD base address of ring 6
0x2_4238 Reserved
0x2_4300 RCTRL—Receive control register
0x2_4304 RSTAT—Receive status register
0x2_4310 RXIC—Receive interrupt coalescing register
0x2_4314 RQUEUE*—Receive queue control register.
0x2_4330 RBIFX*—Receive bit field extract control register
0x2_4334 RQFAR*—Receive queue filing table address register
0x2_4338 RQFCR*—Receive queue filing table control register
0x2_4340 MRBLR—Maximum receive buffer length register
0x2_4380 RBDBPH*—Rx data buffer pointer high bits
0x2_4384 RBPTR0—RxBD pointer for ring 0
0x2_4388 Reserved
0x2_4390 Reserved
0x2_4394 RBPTR2*—RxBD pointer for ring 2
0x2_4398 Reserved
eTSEC1
Offset
Reserved
Reserved
Reserved
Reserved
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 15-4. Module Memory Map (continued)
eTSEC Receive Control and Status Registers
Name
1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
—
—
—
—
—
—
—
—
—
—
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0080_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
15.5.3.2.11/15-49
15.5.3.2.11/15-49
15.5.3.2.11/15-49
15.5.3.2.11/15-49
15.5.3.3.10/15-62
15.5.3.3.11/15-63
15.5.3.3.11/15-63
15.5.3.3.11/15-63
15.5.3.3.11/15-63
15.5.3.3.11/15-63
15.5.3.3.1/15-49
15.5.3.3.2/15-51
15.5.3.3.3/15-53
15.5.3.3.4/15-54
15.5.3.3.5/15-56
15.5.3.3.6/15-57
15.5.3.3.7/15-58
15.5.3.3.8/15-59
15.5.3.3.9/15-62
Section/Page
—
—
—
—
—
—
—
—
—
—
—