MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1003

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.3.1.3
The inbound address translation and mapping unit controls the mapping of transactions from the external
PCI address space to the internal platform address space. The inbound ATMU is comprised of four
windows—a configuration window and three general translation windows. The configuration window has
higher priority than all other inbound ATMU windows and takes precedence over them if there is an
overlap.
Each window contains the following:
Freescale Semiconductor
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•
•
16–19
20–25
26–31
Bits
A base address, which points to the beginning of the window in the external PCI address map. The
base address of each window is also accessible by PCI configuration transactions as base address
registers within the PCI configuration header, as shown in
or updated equivalently through the ATMU memory map or through PCI configuration
transactions to the PCI configuration header.
A translation address, which specifies the upper order bits of the transaction in the local address
space.
A set of attributes including window size and internal transaction attributes.
Name
OWS
WTT
—
PCI ATMU Inbound Registers
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Write transaction type to run on PCI
0000 Reserved
...
0011 Reserved
0100 Memory Write
0101 Reserved
...
0111 Reserved
1000 I/O Write
1001 Reserved
...
1111 Reserved
Reserved
Outbound window size. Outbound translation window size N which is the encoded 2^(N+1) bytes
window size. The smallest window size is 4 Kbytes.
000000Reserved
...
0010114-Kbyte window size
0011008-Kbyte window size
...
0111114-Gbyte window size
1000008-Gbyte window size
10000116-Gbyte window size
100010Reserved
...
111111Reserved
The default POWAR register (0xC10) has an OWS value of 011111.
Table 17-10. POWAR n Field Descriptions (continued)
Description
Figure
17-26. The registers may be read
PCI Bus Interface
17-19