MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1143

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3.10.11 PCI Express Correctable Error Source ID Register—0x134
The PCI Express correctable error source ID register is shown in
18.3.10.12 PCI Express Error Source ID Register—0x136
The PCI Express error source ID register is shown in
Freescale Semiconductor
Offset 0x134
Offset 0x134
Reset
Reset
W
W
R
R
Table 18-105. PCI Express Root Error Command Register Field Description (continued)
15–0
15–0
15
15
Bits
Bits
Bits
6
5
4
3
2
1
0
Table 18-106. PCI Express Correctable Error Source ID Register Field Description
Table 18-107. PCI Express Correctable Error Source ID Register Field Description
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
ERR_COR Source ID Loaded with the Requestor ID indicated in the received ERR_COR
Error Source ID
Figure 18-112. PCI Express Correctable Error Source ID Register
Figure 18-113. PCI Express Correctable Error Source ID Register
MEFNFR
NFEMR
EFNFR
MECR
Name
FEMR
Name
Name
ECR
FUF
Fatal error messages received.
Non-fatal error messages received.
First uncorrectable fatal.
Multiple ERR_FATAL/NONFATAL received.
ERR_FATAL/NONFATAL received.
Multiple ERR_COR received.
ERR_COR received.
Message when the ERR_COR Received register is not already set.
Default value of this field is 0.
ERR_FATAL/NONFATAL source ID
ERR_COR Source ID
Error Source ID
All zeros
All zeros
Figure
18-113.
Description
Description
Description
Figure
18-112.
PCI Express Interface Controller
Access: Read-only
Access: Read-only
18-89
0
0