MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1071

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3.3.4
The PCI Express power management command register, shown in
mechanism to allow the PCI Express controller to get back to L0 link state.
Freescale Semiconductor
Offset 0x02C
Reset
23–24
Bits
25
26
27
28
29
30
31
W
R
0
AIONIE
PIONIE
AIOFIE
PIOFIE
ABPIE
Name
AIBIE
PIBIE
—
Figure 18-10. PCI Express Power Management Command Register (PEX_PMCR)
PCI Express Power Management Command Register (PEX_PMCR)
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
Attention indicator on interrupt enable. When set and PEX_PME_MES_DR[AION]=1 will generate an
interrupt.
1 Enable attention indicator on message interrupt generation
0 Disable attention indicator on message interrupt generation
Attention indicator blink interrupt enable. When set and PEX_PME_MES_DR[AIB]=1 will generate an
interrupt.
1 Enable attention indicator blink message interrupt generation
0 Disable attention indicator blink message interrupt generation
Attention indicator off interrupt enable. When set and PEX_PME_MES_DR[AIOF]=1 will generate an
interrupt.
1 Enable attention indicator off message interrupt generation
0 Disable attention indicator off message interrupt generation
Power indicator on interrupt enable. When set and PEX_PME_MES_DR[PION]=1 will generate an
interrupt.
1 Enable power indicator on message interrupt generation
0 Disable power indicator on message interrupt generation
Power indicator blink interrupt enable. When set and PEX_PME_MES_DR[PIB]=1 will generate an
interrupt.
1 Enable power indicator blink message interrupt generation
0 Disable power indicator blink message interrupt generation
Power indicator off interrupt enable. When set and PEX_PME_MES_DR[PIOF]=1 will generate an
interrupt.
1 Enable power indicator off message interrupt generation
0 Disable power indicator off message interrupt generation
Attention button pressed interrupt enable. When set and PEX_PME_MES_DR[ABP]=1 will generate an
interrupt.
1 Enable attention button press message interrupt generation
0 Disable attention button press message interrupt generation
Table 18-11. PEX_PME_MES_IER Field Descriptions (continued)
—
All zeros
Description
Figure
18-10, provides software a
PCI Express Interface Controller
28
SPMES EXL2S PTOMR
29
Access: Read/Write
30
31
18-17