MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 87

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table
Number
21-4
21-5
21-6
21-7
21-8
21-9
21-10
21-11
21-12
21-13
21-14
21-15
21-16
21-17
21-18
21-19
21-20
21-21
21-22
21-23
21-24
21-25
21-26
21-27
21-28
21-29
21-30
B-1
Freescale Semiconductor
Watchpoint and Trigger Signals—Detailed Signal Descriptions .......................................... 21-8
JTAG Test and Other Signals—Detailed Signal Descriptions .............................................. 21-8
Debug and Watchpoint Monitor Memory Map................................................................... 21-10
WMCR0 Field Descriptions................................................................................................ 21-11
WMCR1 Field Descriptions................................................................................................ 21-13
WMAR Field Descriptions ................................................................................................. 21-13
WMAMR Field Descriptions.............................................................................................. 21-14
WMTMR Field Descriptions .............................................................................................. 21-14
Transaction Types By Interface........................................................................................... 21-15
WMSR Field Descriptions .................................................................................................. 21-16
TBCR0 Field Descriptions.................................................................................................. 21-17
TBCR1 Field Descriptions.................................................................................................. 21-18
TBAR Field Descriptions.................................................................................................... 21-19
TBAMR Field Descriptions ................................................................................................ 21-19
TBTMR Field Descriptions ................................................................................................ 21-20
TBSR Field Descriptions .................................................................................................... 21-21
TBACR Field Descriptions ................................................................................................. 21-22
TBADHR Field Descriptions.............................................................................................. 21-22
TBADR Field Descriptions................................................................................................. 21-23
PCIDR Field Descriptions .................................................................................................. 21-23
CCIDR Field Descriptions .................................................................................................. 21-24
TOSR Field Descriptions .................................................................................................... 21-25
Source and Target ID Values............................................................................................... 21-25
CMD Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 000) .............................. 21-28
DDR Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 001) ............................... 21-29
PCI Trace Buffer Entry Field Descriptions
PCI Express Trace Buffer Entry Field Descriptions
Memory Map...........................................................................................................................B-1
(TBCR1[IFSEL] = 010) ................................................................................................. 21-30
(TBCR1[IFSEL] = 100 or 101 or 110)........................................................................... 21-30
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Tables
Title
Number
Page
lxxxvii

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