MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1111

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.3.8.3.1
Base address register 0 at offset 0x10 is a special fixed 1-Mbyte window that is used for inbound
configuration accesses. This window is called the PCI Express configuration and status register base
address register (PEXCSRBAR). Note that PEXCSRBAR cannot be updated through the inbound ATMU
registers. The PEXCSRBAR is shown in
Table 18-44
18.3.8.3.2
The primary bus number register is shown in
Table 18-56
Freescale Semiconductor
31–20 ADDRESS Indicates the base address that the inbound configuration window occupies. This window is fixed
Offset 0x18
19–4
Bits
2–1
Reset
Offset 0x10
Reset
3
0
W
W
R
R
Bits
7–0
31
MemSp
describes the PCI Express configuration and status register base address register.
Name
PREF
describes the primary bus number register fields.
TYPE
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
PCI Express Base Address Register 0—0x10
PCI Express Primary Bus Number Register—Offset 0x18
7
Table 18-56. PCI Express Primary Bus Number Register Field Description
Primary Bus Number
Figure 18-59. PCI Express Base Address Register 0 (PEXCSRBAR)
ADDRESS
at 1 Mbyte.
Reserved
Prefetchable
Type.
00 Locate anywhere in 32-bit address space.
Memory space indicator
Name
Figure 18-60. PCI Express Primary Bus Number Register
Table 18-55. PEXCSRBAR Field Descriptions
20 19
Bus that is connected to the upstream interface. Note that this register is
programmed during system enumeration; in RC mode this register
should remain 0x00.
Figure
Figure
Primary Bus Number
18-47.
All zeros
All zeros
18-60.
Description
—
Description
4
PREF
3
PCI Express Interface Controller
Access: Read/Write
2
TYPE
Access: Mixed
1
MemSp
0
0
18-57