MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1001

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 17-8
17.3.1.2.3
The PCI outbound window base address registers (POWBARn) point to the beginning of each translation
window in the local 32-bit address space. Addresses for outbound transactions are compared to the
appropriate bits in these registers, according to the sizes of the windows. If a transaction does not fall
within one of these windows, the default translation and mapping is used. The default window is always
enabled and used when the other windows miss.
Note that POWBAR0 (for outbound ATMU window 0) is not used, because window 0 is the default
window used when no other windows match. POWBAR0 may be read from and written to, but the value
is ignored.
The format of the POWBARn is shown in
Table 17-9
Freescale Semiconductor
Offset 0xC04, 0xC24, 0xC44, 0xC64, 0xC84
Offset 0xC28, 0xC48, 0xC68, 0xC88
Reset
Reset
12–31 WBA Window base address. Source address which is the starting point for the outbound window.
0–11 WBEA Window base extended address. Bits 0–7 are reserved; bits 8–11 correspond to bits [0:3] of the
W
W
Bits
R
R
12–31
0–11
Bits
0
0
Name
describes the fields of the POTEARn.
describes the field of the POWBARn.
Figure 17-7. PCI Outbound Translation Extended Address Registers (POTEAR n )
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Name
PCI Outbound Window Base Address Registers (POWBAR n )
TEA
—
Figure 17-8. PCI Outbound Window Base Address Registers (POWBAR n )
(internal platform) base address.
0x000 – 0x00F are valid.
0x010 and greater are reserved.
The window must be aligned based on the size selected in the window size bits. Corresponds to bits
[4-35] of the (internal platform) base address.
Reserved
Translation extended address. Comprise bits [63:44] of the translation address.
WBEA
—
Table 17-9. POWBAR n Field Descriptions
Table 17-8. POTEAR n Field Descriptions
11 12
11 12
Figure
17-8.
All zeros
All zeros
Description
Description
WBA
TEA
Access: Read/Write
Access: Read/Write
PCI Bus Interface
17-17
31
31