MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1267

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Appendix B
Complete List of Configuration, Control, and Status
Registers
Freescale Semiconductor
0x0_0BFC
0x0_0CA8
0x0_0CB0
0x0_0CC8
0x0_0CD0
0x0_0CE8
0x0_0BF8
0x0_0C08
0x0_0C10
0x0_0C28
0x0_0C30
0x0_0C48
0x0_0C50
0x0_0C68
0x0_0C70
0x0_0C88
0x0_0C90
0x0_0CF0
0x0_0D08
0x0_0D10
0x0_0000
0x0_0008
0x0_0010
0x0_0020
Offset
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
CCSRBAR—Configuration, control, and status registers
base address register
ALTCBAR—Alternate configuration base address register
ALTCAR—Alternate configuration attribute register
BPTR—Boot page translation register
LAIPBRR1—Local access IP block revision register 1
LAIPBRR2—Local access IP block revision register 2
LAWBAR0—Local access window 0 base address register
LAWAR0—Local access window 0 attribute register
LAWBAR1—Local access window 1 base address register
LAWAR1—Local access window 1 attribute register
LAWBAR2—Local access window 2 base address register
LAWAR2—Local access window 2 attribute register
LAWBAR3—Local access window 3 base address register
LAWAR3—Local access window 3 attribute register
LAWBAR4—Local access window 4 base address register
LAWAR4—Local access window 4 attribute register
LAWBAR5—Local access window 5 base address register
LAWAR5—Local access window 5 attribute register
LAWAR6—Local access window 6 attribute register
LAWBAR7—Local access window 7 base address register
LAWAR7—Local access window 7 attribute register
LAWBAR8—Local access window 8 base address register
LAWAR8—Local access window 8 attribute register
LAWBAR6—Local access window 6 base address register
Local-Access Registers—Local-Access Window Base and Size Registers
Local-Access Registers—Configuration, Control, and Status Registers
Register
Table B-1. Memory Map
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
0x000F_F700
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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B-1