MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1167

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 19
Global Utilities
This chapter describes the global utilities of the MPC8544E It provides signal descriptions, register
descriptions, and a functional description of these utilities.
19.1
The global utilities block controls power management, I/O device enabling, power-on-reset (POR)
configuration monitoring, general-purpose I/O signal configuration, alternate function select ion for
multiplexed signals, and clock control.
19.2
This section provides an overview of global utilities features.
19.2.1
The following features affect the device’s overall power consumption:
19.2.2
The POR configuration values of all device parameters sampled from pins at reset are available through
memory-mapped registers in the global utilities block.
19.2.3
IRQ[9:11] and LCS[5:7] serve multiple functions that can be selected by configuration registers in the
global utilities block.
19.2.4
The global utilities block also selects the internal clock signal driven on CLK_OUT.
Freescale Semiconductor
Dynamic power management mode
Software-controlled power management (doze, nap, sleep)
Externally controlled power management (doze, sleep)
Static power management (I/O block disables)
Overview
Global Utilities Features
Power Management and Block Disables
Accessing Current POR Configuration Settings
Interrupt and Local Bus Signal Multiplexing
Clock Control
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
19-1

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