MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 841

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 15-104
15.5.3.7.2
The GADDRn registers are written by the user. Together these registers represent, depending on
RCTRL[GHTX], either the 256 entries of the group address hash table, or the last 256 entries of the
extended group address hash table used in the address recognition process. The user can enable a hash
entry by setting the appropriate bit. A hash table hit occurs if the DA CRC result points to an enabled hash
entry.
Table 15-104
Freescale Semiconductor
0–31 IGADDR n Represents the 32-bit value associated with the corresponding register. When RCTRL[GHTX] = 0,
0–31
Bits
Bits
Offset eTSEC1:0x2_4880+ 4 × n ; eTSEC3:0x2_5880+ 4 × n
Reset
Figure 15-101
W
R
GADDR n Represents the 32-bit value associated with the corresponding register. When RCTRL[GHTX] = 0,
Name
Name
0
describes the fields of the IGADDRn register.
describes the fields of the GADDRn register.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Group Address Registers 0–7 (GADDR n )
IGADDR0 contains entries 0–31 of the 256-entry individual hash table and IGADDR7 represents entries
224–255. When RCTRL[GHTX] = 1, IGADDR0 contains entries 0–31 of the 512-entry extended group hash
table and IGADDR7 represents entries 224–255.
GADDR0 contains entries 0–31 of the 256-entry group hash table and GADDR7 represents entries
224–255. When RCTRL[GHTX] = 1, GADDR0 contains entries 256–287 of the 512-entry extended group
hash table and GADDR7 represents entries 480–511.
describes the definition for the GADDRn register.
Figure 15-101. GADDR n Register Definition
Table 15-103. IGADDR n Field Descriptions
Table 15-104. GADDR n Field Descriptions
GADDR n
All zeros
Description
Description
Enhanced Three-Speed Ethernet Controllers
Access: Read/Write
15-109
31