MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 855

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer:
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Quantity:
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15.5.4.3.6
Figure 15-112
Table 15-117
Freescale Semiconductor
Offset 0x07
0–12
Reset
5–15
Bits
Bits
13
14
15
0
1
2
3
4
W
R
Page
Next
Un-formatted
Name
Page
Able
Rx’d
0
Code Field
Next Page
Msg Page
Message/
NP
Toggle
Name
Ack2
describes the fields of the ANNPT register.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
describes the definition for the ANNPT register.
AN Next Page Transmit Register (ANNPT)
Reserved, should be cleared.
Next page able. This bit is read-only and returns 1 on read. While read as set, indicates local device supports
next page function.
Page received. This bit is read-only. The bit clears on a read to the register.
0 Normal operation.
1 A new page was received and stored in the applicable AN link partner ability or AN next page register. This
bit latches high in order for software to detect while polling.
Reserved, should be cleared.
1
Page
Msg
Next page indication. [Reference MII bit 7.15 in IEEE 802.3, 2000 Edition Clause 28.2.4]
0 Last page.
1 Additional next pages to follow.
Reserved. (Ignore on read)
Message page. [Reference MII bit 7.13]
0 Unformatted page.
1 Message page.
Acknowledge 2. Used by the next page function to indicate that the device has the ability to comply
with the message. [Reference MII bit 7.12]
0 The local device cannot comply with message.
1 The local device complies with message.
Toggle. Used to ensure synchronization with the link partner during next page exchange. This bit
always takes the opposite value of the toggle bit of the previously-exchanged link code word. The
initial value in the first next page transmitted is the inverse of bit 11 in the base link code word.
[Reference MII bit 7.11] This bit is read-only.
0 Toggle bit of the previously-exchanged link code word was 1.
1 Toggle bit of the previously-exchanged link code word was 0.
Message pages are formatted pages that carry a pre-defined message code, which is enumerated in
IEEE 802.3u/Annex 28C. Unformatted code fields take on an arbitrary value. [Reference MII field
7.10:0]
2
Figure 15-112. AN Next Page Transmit Register Definition
Ack2
3
Table 15-117. ANNPT Field Descriptions
Table 15-116. ANEX Field Descriptions
Toggle
4
5
All zeros
Description
Message/Un-formatted Code Field
Description
Enhanced Three-Speed Ethernet Controllers
Access: Mixed
15-123
15

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