MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 831

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.5.3.6.38 Transmit Jabber Frame Counter (TJBR)
Figure 15-89
Table 15-92
15.5.3.6.39 Transmit FCS Error Counter (TFCS)
Figure 15-90
Table 15-93
Freescale Semiconductor
Offset eTSEC1:0x2_4718; eTSEC3:0x2_5718
Reset
Offset eTSEC1:0x2_471C; eTSEC3:0x2_571C
Reset
20–31
20–31
0–19
0–19
Bits
Bits
W
W
R
R
0
0
describes the fields of the TJBR register.
describes the fields of the TFCS register.
Name
Name
TFCS
TJBR
describes the definition for the TJBR register.
describes the definition for the TFCS register.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
—
Figure 15-89. Transmit Jabber Frame Counter Register Definition
Reserved
Transmit jabber frame counter. Increments for each oversized transmitted frame with an incorrect
FCS value.
Reserved
Transmit FCS error counter. Increments for every valid sized packet with an incorrect FCS value.
Figure 15-90. Transmit FCS Error Counter Register Definition
Table 15-92. TJBR Field Descriptions
Table 15-93. TFCS Field Descriptions
—
—
All zeros
All zeros
Description
Description
19 20
19 20
Enhanced Three-Speed Ethernet Controllers
TJBR
TFCS
Access: Read/Write
Access: Read/Write
15-99
31
31