MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 620

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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DUART
When the interrupts are disabled in UIER, polling software can not use UIIR[0] to determine whether the
UART is ready for service. The software must monitor the appropriate bits in the line status (ULSR) and/or
the modem status (UMSR) registers. UIIR[0] can be used for polling if the interrupts are enabled in UIER.
13.5
The following requirements must be met for DUART accesses:
A system reset puts the DUART registers to a default state. Before the interface can transfer serial data,
the following initialization steps are recommended:
13-24
1. Update the programmable interrupt controller (PIC) DUART channel interrupt vector source
2. Set data attributes and control bits in the ULCR, UFCR, UAFR, UMCR, UDLB, and UDMB.
3. Set the data attributes and control bits of the external modem or peripheral device.
4. Set the interrupt enable register (UIER).
5. To start a write transfer, write to the UTHR.
6. Poll UIIR if the interrupts generated by the DUART are masked.
All DUART registers must be mapped to a cache-inhibited and guarded area. (That is, the WIMG
setting in the MMU needs to be 0b01X1.)
All DUART registers are 1 byte wide. Reads and writes to these registers must be byte-wide
operations.
registers.
DUART Initialization/Application Information
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Freescale Semiconductor

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