MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 75

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table
Number
13-5
13-6
13-7
13-8
13-9
13-10
13-11
13-12
13-13
13-14
13-15
13-16
13-17
13-18
13-19
13-20
13-21
13-22
13-23
13-24
14-1
14-2
14-3
14-4
14-5
14-6
14-7
14-8
14-9
14-10
14-11
14-12
14-13
14-14
14-15
14-16
14-17
14-18
14-19
14-20
14-21
Freescale Semiconductor
UTHR Field Descriptions ..................................................................................................... 13-7
UDMB Field Descriptions .................................................................................................... 13-7
UDLB Field Descriptions ..................................................................................................... 13-8
Baud Rate Examples ............................................................................................................. 13-8
UIER Field Descriptions ....................................................................................................... 13-9
UIIR Field Descriptions ...................................................................................................... 13-10
UIIR IID Bits Summary...................................................................................................... 13-10
UFCR Field Descriptions.................................................................................................... 13-12
ULCR Field Descriptions.................................................................................................... 13-13
Parity Selection Using ULCR[PEN], ULCR[SP], and ULCR[EPS] .................................. 13-14
UMCR Field Descriptions .................................................................................................. 13-14
ULSR Field Descriptions .................................................................................................... 13-15
UMSR Field Descriptions................................................................................................... 13-16
USCR Field Descriptions.................................................................................................... 13-17
UAFR Field Descriptions.................................................................................................... 13-18
UDSR Field Descriptions.................................................................................................... 13-18
UDSR[TXRDY] Set Conditions ......................................................................................... 13-19
UDSR[TXRDY] Cleared Conditions.................................................................................. 13-19
UDSR[RXRDY] Set Conditions......................................................................................... 13-19
UDSR[RXRDY] Cleared .................................................................................................... 13-19
Signal Properties—Summary................................................................................................ 14-4
Local Bus Controller Detailed Signal Descriptions .............................................................. 14-5
Local Bus Controller Memory Map...................................................................................... 14-9
BRn Field Descriptions....................................................................................................... 14-11
Memory Bank Sizes in Relation to Address Mask ............................................................ 14-12
ORn—GPCM Field Descriptions ....................................................................................... 14-13
ORn—UPM Field Descriptions .......................................................................................... 14-15
ORn—SDRAM Field Descriptions .................................................................................... 14-16
MAR Field Descriptions ..................................................................................................... 14-17
MxMR Field Descriptions................................................................................................... 14-17
MRTPR Field Descriptions ................................................................................................. 14-20
MDR Field Descriptions ..................................................................................................... 14-20
LSDMR Field Descriptions ................................................................................................ 14-21
LURT Field Descriptions .................................................................................................... 14-23
LSRT Field Descriptions..................................................................................................... 14-24
LTESR Field Descriptions .................................................................................................. 14-25
LTEDR Field Descriptions.................................................................................................. 14-26
LTEIR Field Descriptions ................................................................................................... 14-27
LTEATR Field Descriptions................................................................................................ 14-28
LTEAR Field Descriptions.................................................................................................. 14-29
LBCR Field Descriptions.................................................................................................... 14-29
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Tables
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Number
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