MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 755

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
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4
15.5.3
This section provides a detailed description of all the eTSEC registers. Because all of the eTSEC registers
are 32 bits wide, only 32-bit register accesses are supported.
15.5.3.1
This section describes general control and status registers used for both transmitting and receiving Ethernet
frames. All of the registers are 32 bits wide.
15.5.3.1.1
The controller ID register (TSEC_ID) is a read-only register. The TSEC_ID register is used to identify the
eTSEC block and revision.
Table 15-9
Freescale Semiconductor
Offset eTSEC1:0x2_4000; eTSEC3:0x2_5000
16–23
24–31
0–15
eTSEC3 has the same memory-mapped registers that are described for eTSEC1 from 0x 2_4000 to 0x2_4FFF, except the
offsets are from 0x 2_5000 to 0x2_5FFF.
Bits
W
R
0
TSEC_REV_MN Value identifies the minor revision of the eTSEC.
TSEC_REV_MJ
describes the fields of the TSEC_ID register.
TSEC_ID
Memory-Mapped Register Descriptions
Name
eTSEC General Control and Status Registers
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Controller ID Register (TSEC_ID)
Value identifying the eTSEC (10/100/1000 Ethernet MAC).
0124 Unique identifier for eTSEC with 8 Rx and 8 Tx BD rings.
Value identifies the major revision of the eTSEC.
00 Initial revision
TSEC_ID
Table 15-5. TSEC_ID Field Descriptions
Figure 15-2. TSEC_ID Register
15 16
Description
TSEC_REV_MJ
Enhanced Three-Speed Ethernet Controllers
23 24
TSEC_REV_MN
Access: Read only
15-23
31

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